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path: root/src/northbridge/intel
AgeCommit message (Expand)Author
2019-12-02src: Move 'static' to the beginning of declarationElyes HAOUAS
2019-12-01nb/intel/x4x: Factor out hiding PCI devs in pure fnArthur Heymans
2019-11-26nb/intel/sandybridge: Fix mrc.bin pathArthur Heymans
2019-11-25cpu/intel/slot_1: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-25Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbolArthur Heymans
2019-11-21nb/sb/cpu: Drop Intel Rangeley supportArthur Heymans
2019-11-18nb/intel/sandybridge/mrc: Handle P2P disabling via devicetreeNico Huber
2019-11-18nb/intel/sandybridge: Set up console in bootblockArthur Heymans
2019-11-18nb/intel/sandybridge: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-18nb/intel/sandybridge: Configure DCACHE_BSP_STACK_SIZEArthur Heymans
2019-11-18sb/intel/bd82x6x: Make the pch_enable_lpc hook optionalArthur Heymans
2019-11-18nb/intel/sandybridge: Make the mainboard_rcba_config hook optionalArthur Heymans
2019-11-18nb/intel/sandybridge: Make the mainboard_early_init hook optionalArthur Heymans
2019-11-15nb/intel/x4x: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-15nb/intel/i945: Initialize console in bootblockArthur Heymans
2019-11-15nb/intel/i945: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-15nb/intel/i945: Move boilerplate romstage to a common locationArthur Heymans
2019-11-15nb/intel/x4x: Move boilerplate romstage to a common locationArthur Heymans
2019-11-14mb/*/*(ich7/x4x): Use common early southbridge initArthur Heymans
2019-11-14sb/intel/i82801jx: Move early sb init to a common placeArthur Heymans
2019-11-14sb/intel/i82801gx: Add common early codeArthur Heymans
2019-11-14nb/intel/i440bx: Remove unnecessary __SIMPLE_DEVICE__Arthur Heymans
2019-11-13nb/intel/x4x.h: Include stdint.hArthur Heymans
2019-11-13sb/intel/i82801gx: Add a function to set up BARArthur Heymans
2019-11-11fsp{rangeley,baytrail,broadwell_de}: Fix dead assignmentElyes HAOUAS
2019-11-08arch/x86: Drop some __SMM__ guardsKyösti Mälkki
2019-11-05intel/i440bx: Switch to UDELAY_TSC and TSC_MONOTONIC_TIMERKyösti Mälkki
2019-11-04nb/intel: Use defined DEFAULT_RCBAElyes HAOUAS
2019-11-04nb/intel/nehalem: Fix 'dead assignment'Elyes HAOUAS
2019-11-04nb/intel/x4x/x4x.h: Include iomap.hArthur Heymans
2019-11-03arch/x86: Use the stage argument to implement cbmem_topArthur Heymans
2019-11-02nb/intel/gm45: Add VBOOT supportArthur Heymans
2019-11-01lib/cbmem_top: Add a common cbmem_top implementationArthur Heymans
2019-11-01nb/intel: Remove unused 'barrier()'Elyes HAOUAS
2019-10-29nb/intel/{nehalem,x4x}: Remove unused 'include <pc80/vga_io.h>'Elyes HAOUAS
2019-10-28nb/intel/gm45: Add C_ENVIRONMENT_BOOTBLOCK supportArthur Heymans
2019-10-28src: Remove unused '#include <cpu/cpu.h>'Elyes HAOUAS
2019-10-27src/[northbridge,security]: change "unsigned" to "unsigned int"Martin Roth
2019-10-24acpi: Drop wrong _ADR objects for PCI host bridgesElyes HAOUAS
2019-10-21src/{device,drivers,mb,nb,soc,sb}: Remove unused 'include <console/console.h>'Elyes HAOUAS
2019-10-17nb/intel/nehalem/vboot: Ignore invalid POSTINIT on TPM startupArthur Heymans
2019-10-17nb/intel/nehalem: Only enable_smbus onceArthur Heymans
2019-10-17nb/intel/nehalem: use pmclib to detect S3 resumeArthur Heymans
2019-10-17nb/intel/nehalem: Add some debug outputArthur Heymans
2019-10-17nb/intel/nehalem: Change the output verbosity of raminit timingsArthur Heymans
2019-10-14nb/intel/gm45: Don't run graphics init on s3 resumeArthur Heymans
2019-10-14sb/intel/i82801ix: Add common code to set up LPC IO decode rangesArthur Heymans
2019-10-13nb/intel/nehalem: Start VBOOT in bootblock with a separate verstageArthur Heymans
2019-10-13nb/intel/nehalem: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-10-13sb/intel/ibexpeak: Move some early PCH init after console initArthur Heymans
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