coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2013-03-14	haswell: add PCI id support	Aaron Durbin
2013-03-14	haswell: Remove logic to send dram init done to ME	Aaron Durbin
2013-03-14	haswell: notes and updates.	Aaron Durbin
2013-03-14	haswell: align pei_data structure with intel-framework	Aaron Durbin
2013-03-14	haswell: use #defines for constants in udelay.c	Aaron Durbin
2013-03-14	haswell: Add LPT LP device IDs to platform report	Duncan Laurie
2013-03-14	haswell: Update GPU power management setup	Duncan Laurie
2013-03-14	haswell: always use MMIO PCI config accesses	Aaron Durbin
2013-03-14	haswell: Add initial support for Haswell platforms	Aaron Durbin
2013-03-09	Add Intel Panther Point USB3 initialization	Marc Jones
2013-03-07	Intel e7505: provide get_top_of_ram	Kyösti Mälkki
2013-03-01	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel
2013-02-28	Drop CONFIG_WRITE_HIGH_TABLES	Stefan Reinauer
2013-02-14	sconfig: rename lapic_cluster -> cpu_cluster	Stefan Reinauer
2013-02-14	sconfig: rename pci_domain -> domain	Stefan Reinauer
2013-02-11	spi.h: Rename the spi.h to spi-generic.h	Zheng Bao
2013-02-11	Intel: Replace MSR 0xcd with MSR_FSB_FREQ	Patrick Georgi
2013-01-30	Extend CBFS to support arbitrary ROM source media.	Hung-Te Lin
2013-01-14	Support for Celeron 1007U	Stefan Reinauer
2012-11-28	Remove assembly coded log2 function	Ronald G. Minnich
2012-11-27	Drop driver-y from GM45/ICH9/RK9	Stefan Reinauer
2012-11-27	Remove AMD special case for LAPIC based udelay()	Patrick Georgi
2012-11-27	Get rid of drivers class	Patrick Georgi
2012-11-27	intel/gm45: new northbridge	Patrick Georgi
2012-11-24	yabel: Use X86_* instead of the more verbose M.x86.REG_*	Patrick Georgi
2012-11-17	Use new system agent binaries	Stefan Reinauer
2012-11-14	Sandybridge: Set PEG clock gating	Marc Jones
2012-11-14	Add PCIe init and NMode flag to PEI data structure	Stefan Reinauer
2012-11-14	Add ddr3lv_support flag to pei_data structure	Duncan Laurie
2012-11-14	pei_data.h: Fix comment	Marc Jones
2012-11-14	Provide MRC with a console printing callback function	Vadim Bendebury
2012-11-12	Initial IGD OpRegion implementation	Stefan Reinauer
2012-11-12	Avoid using hardcoded values in MRC cache code	Vadim Bendebury
2012-11-09	Make coreboot use the offset parameter in cbfstool create	Stefan Reinauer
2012-11-09	Make register/value lists const	Stefan Reinauer
2012-11-07	SandyBridge/IvyBridge: Use flash map to find MRC cache	Stefan Reinauer
2012-11-07	Add missing newline in error message	Stefan Reinauer
2012-11-07	CMOS: Move MRC seed offset into upper bank	Duncan Laurie
2012-11-02	Fix some issues with new "reference" toolchain	Stefan Reinauer
2012-10-26	northbridge/sch: move the \n so it reads a little better	Sebastian Andrzej Siewior
2012-10-26	northbridge/sch: read the size of main memory from the proper register	Sebastian Andrzej Siewior
2012-10-26	northbridge/sch: Read the GPU memory from the correct PCI device	Sebastian Andrzej Siewior
2012-10-26	northbridge/sch: don't overwrite hightables with GPU / TSEG memory	Sebastian Andrzej Siewior
2012-10-07	Remove chip.h files without config structure	Kyösti Mälkki
2012-09-25	HAVE_HIGH_TABLES is gone	Patrick Georgi
2012-08-22	Auto-declare chip_operations	Kyösti Mälkki
2012-08-09	Sandybridge: Fix integer overrun in romstage udelay()	Stefan Reinauer
2012-08-08	Cleanup coreboot memory table includes	Kyösti Mälkki
2012-08-07	Sandy/Ivy Bridge and Cougar/Panther Point: Fix names	Stefan Reinauer
2012-08-01	Intel and GFXUMA: drop redundant use of lb_add_memory_range()	Kyösti Mälkki