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coreboot
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broadwell_refcode
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Some coreboot project code with my work
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intel
Age
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Author
2016-03-16
cpu/x86/mtrr: move cache_ramstage() to its only user
Aaron Durbin
2016-03-13
northbridge/intel/i3100: Unify UDELAY selection
Stefan Reinauer
2016-03-13
northbridge/intel/i82810: Unify UDELAY selection
Stefan Reinauer
2016-03-12
northbridge/intel/i82830: Unify UDELAY selection
Stefan Reinauer
2016-03-11
northbridge/intel: move mrccache.c of sandybridge + haswell to common
Alexander Couzens
2016-03-11
northbridge/intel: move mrc_cache definition into a common header
Alexander Couzens
2016-03-11
nortbridge/sandybridge/mrccache: parse the return code of flash->write
Alexander Couzens
2016-03-11
northbridge/i945/gma: Re-enable NVRAM tft_brightness
Alexander Couzens
2016-03-10
northbridge/intel/i440bx: Unify UDELAY selection
Stefan Reinauer
2016-03-09
northbridge/intel/gm45: Use TSC for ramstage timer per default
Stefan Reinauer
2016-03-05
sandybridge/gma_lvds: support both Sandy&Ivy on one board
Iru Cai
2016-03-03
nb/intel/sandybridge/raminit: Fill SMBIOS type17 info
Patrick Rudolph
2016-03-02
nb/intel/sandybridge/romstage: Read fuse bits for max MEM Clk
Patrick Rudolph
2016-03-02
nb/intel/sandybridge/raminit: Make discover_timC_write non cyclic
Patrick Rudolph
2016-02-28
northbridge/intel: add missing #include guards
Iru Cai
2016-02-26
nb/intel/sandybridge/raminit: Adjust timB to prevent overflow
Patrick Rudolph
2016-02-26
tree wide: Convert "if (CONFIG_.*_TPM.*)" to "if (IS_ENABLED(...))"
Denis 'GNUtoo' Carikli
2016-02-20
nb/intel/sandybridge/raminit: Add XMP support
Patrick Rudolph
2016-02-19
nb/intel/sandybridge/raminit: Improve logging
Patrick Rudolph
2016-02-18
nb/intel/sandybridge: Start PEG link training
Patrick Rudolph
2016-02-18
southbridge/intel/bd82x6x: Use common gpio.c
Patrick Rudolph
2016-02-16
nb/intel/sandybridge/raminit: Add shift offset
Patrick Rudolph
2016-02-13
sandybridge: Always include MRC if not using native RAM init.
Vladimir Serbinenko
2016-02-12
Make MRC vs native a config rather than making a separate chipset for it.
Vladimir Serbinenko
2016-02-12
Merge sandy/ivybridge romstage flow for MRC and non-MRC.
Vladimir Serbinenko
2016-02-10
Kconfig: Move defaults for CBFS_SIZE
Martin Roth
2016-02-09
sandybridge: Set all native gfx-related options in northbridge code.
Vladimir Serbinenko
2016-02-09
ivy: Add a possiblity for mainboard early init.
Vladimir Serbinenko
2016-02-09
Revert "northbridge/intel/peg: Disable unused ports"
Nico Huber
2016-02-04
northbridge/intel/peg: Disable unused ports
Patrick Rudolph
2016-02-04
nb/intel/sandybridge/raminit: Fix two dimms per channel
Patrick Rudolph
2016-01-29
Revert "northbridge/intel/sandybridge: Fix random raminit failures"
Vladimir Serbinenko
2016-01-29
nb/intel/x4x: Move to early cbmem
Damien Zammit
2016-01-29
nb/intel/x4x: Cleanup gma.c
Damien Zammit
2016-01-29
nb/intel/x4x: Tidy up raminit and fix msbpos() function
Damien Zammit
2016-01-29
nb/intel/x4x: Tidy up northbridge
Damien Zammit
2016-01-29
nb/intel/x4x: Fix memory hole with both channels populated
Damien Zammit
2016-01-28
nb/intel/pineview: Native VGA init (CRT)
Damien Zammit
2016-01-26
nb/intel/pineview: Increase MMCONF decoding to 256 busses
Damien Zammit
2016-01-20
nb/intel/pineview: Use macro names for memory base registers
Damien Zammit
2016-01-18
nb/intel/pineview: Fix decode_pciebar()
Damien Zammit
2016-01-18
header files: Fix guard name comments to match guard names
Martin Roth
2016-01-17
intel/sandybridge/raminit: fix ODT setting
Patrick Rudolph
2016-01-14
nb/intel/gm45: Backport configuration of panel power timings
Nico Huber
2016-01-14
nb/intel/gm45: Drop unnecessary panel power handling
Nico Huber
2016-01-13
intel/northbridge/sandy: raminit code cleanup
Patrick Rudolph
2016-01-13
northbridge/intel/x4x: clean up includes
Martin Roth
2016-01-12
nb/intel/gm45: Convert gma.c to `if (IS_ENABLED(` style
Nico Huber
2016-01-07
Correct some common spelling mistakes
Martin Roth
2015-12-31
nb/intel/gm45: Export low-power and (SFF) options
Nico Huber
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