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path: root/src/northbridge/intel
AgeCommit message (Expand)Author
2016-03-16cpu/x86/mtrr: move cache_ramstage() to its only userAaron Durbin
2016-03-13northbridge/intel/i3100: Unify UDELAY selectionStefan Reinauer
2016-03-13northbridge/intel/i82810: Unify UDELAY selectionStefan Reinauer
2016-03-12northbridge/intel/i82830: Unify UDELAY selectionStefan Reinauer
2016-03-11northbridge/intel: move mrccache.c of sandybridge + haswell to commonAlexander Couzens
2016-03-11northbridge/intel: move mrc_cache definition into a common headerAlexander Couzens
2016-03-11nortbridge/sandybridge/mrccache: parse the return code of flash->writeAlexander Couzens
2016-03-11northbridge/i945/gma: Re-enable NVRAM tft_brightnessAlexander Couzens
2016-03-10northbridge/intel/i440bx: Unify UDELAY selectionStefan Reinauer
2016-03-09northbridge/intel/gm45: Use TSC for ramstage timer per defaultStefan Reinauer
2016-03-05sandybridge/gma_lvds: support both Sandy&Ivy on one boardIru Cai
2016-03-03nb/intel/sandybridge/raminit: Fill SMBIOS type17 infoPatrick Rudolph
2016-03-02nb/intel/sandybridge/romstage: Read fuse bits for max MEM ClkPatrick Rudolph
2016-03-02nb/intel/sandybridge/raminit: Make discover_timC_write non cyclicPatrick Rudolph
2016-02-28northbridge/intel: add missing #include guardsIru Cai
2016-02-26nb/intel/sandybridge/raminit: Adjust timB to prevent overflowPatrick Rudolph
2016-02-26tree wide: Convert "if (CONFIG_.*_TPM.*)" to "if (IS_ENABLED(...))"Denis 'GNUtoo' Carikli
2016-02-20nb/intel/sandybridge/raminit: Add XMP supportPatrick Rudolph
2016-02-19nb/intel/sandybridge/raminit: Improve loggingPatrick Rudolph
2016-02-18nb/intel/sandybridge: Start PEG link trainingPatrick Rudolph
2016-02-18southbridge/intel/bd82x6x: Use common gpio.cPatrick Rudolph
2016-02-16nb/intel/sandybridge/raminit: Add shift offsetPatrick Rudolph
2016-02-13sandybridge: Always include MRC if not using native RAM init.Vladimir Serbinenko
2016-02-12Make MRC vs native a config rather than making a separate chipset for it.Vladimir Serbinenko
2016-02-12Merge sandy/ivybridge romstage flow for MRC and non-MRC.Vladimir Serbinenko
2016-02-10Kconfig: Move defaults for CBFS_SIZEMartin Roth
2016-02-09sandybridge: Set all native gfx-related options in northbridge code.Vladimir Serbinenko
2016-02-09ivy: Add a possiblity for mainboard early init.Vladimir Serbinenko
2016-02-09Revert "northbridge/intel/peg: Disable unused ports"Nico Huber
2016-02-04northbridge/intel/peg: Disable unused portsPatrick Rudolph
2016-02-04nb/intel/sandybridge/raminit: Fix two dimms per channelPatrick Rudolph
2016-01-29Revert "northbridge/intel/sandybridge: Fix random raminit failures"Vladimir Serbinenko
2016-01-29nb/intel/x4x: Move to early cbmemDamien Zammit
2016-01-29nb/intel/x4x: Cleanup gma.cDamien Zammit
2016-01-29nb/intel/x4x: Tidy up raminit and fix msbpos() functionDamien Zammit
2016-01-29nb/intel/x4x: Tidy up northbridgeDamien Zammit
2016-01-29nb/intel/x4x: Fix memory hole with both channels populatedDamien Zammit
2016-01-28nb/intel/pineview: Native VGA init (CRT)Damien Zammit
2016-01-26nb/intel/pineview: Increase MMCONF decoding to 256 bussesDamien Zammit
2016-01-20nb/intel/pineview: Use macro names for memory base registersDamien Zammit
2016-01-18nb/intel/pineview: Fix decode_pciebar()Damien Zammit
2016-01-18header files: Fix guard name comments to match guard namesMartin Roth
2016-01-17intel/sandybridge/raminit: fix ODT settingPatrick Rudolph
2016-01-14nb/intel/gm45: Backport configuration of panel power timingsNico Huber
2016-01-14nb/intel/gm45: Drop unnecessary panel power handlingNico Huber
2016-01-13intel/northbridge/sandy: raminit code cleanupPatrick Rudolph
2016-01-13northbridge/intel/x4x: clean up includesMartin Roth
2016-01-12nb/intel/gm45: Convert gma.c to `if (IS_ENABLED(` styleNico Huber
2016-01-07Correct some common spelling mistakesMartin Roth
2015-12-31nb/intel/gm45: Export low-power and (SFF) optionsNico Huber
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