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path: root/src/northbridge/intel
AgeCommit message (Expand)Author
2020-04-05src/northbridge: Use SPDX for GPL-2.0-only filesAngel Pons
2020-04-05Drop explicit NULL initializations from `device_operations`Elyes HAOUAS
2020-04-02nb/intel/pineview: drop intel_gma_get_controller_info()Matt DeVillier
2020-04-02nb/intel/gm45: Simplify GMA SSDT generatorMatt DeVillier
2020-04-02nb/intel/i945: Simplify GMA SSDT generatorMatt DeVillier
2020-04-02nb/intel/x4x: Simplify GMA SSDT generatorMatt DeVillier
2020-04-02nb/intel/ironlake: Simplify GMA SSDT generatorMatt DeVillier
2020-04-02nb/intel/sandybridge: Simplify GMA SSDT generatorMatt DeVillier
2020-04-02nb/intel/haswell: Simplify GMA SSDT generatorMatt DeVillier
2020-04-02Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator`Nico Huber
2020-03-31drivers/intel/gma: fold gma.asl into default_brightness_levels.aslMatt DeVillier
2020-03-30nb/intel/i945: Make some cosmetic changesElyes HAOUAS
2020-03-29nb/intel/haswell: Implement proper backlight PWM configNico Huber
2020-03-26nb/intel/sandybridge: Use macros for JEDEC commandsAngel Pons
2020-03-26nb/intel/sandybridge: Fix IOSAV register descriptionAngel Pons
2020-03-26nb/intel/sandybridge: Correct TC_DTP handlingAngel Pons
2020-03-26nb/intel/sandybridge: Add and use TC_DTP definitionAngel Pons
2020-03-26nb/intel/sandybridge: Use IOSAV_BYTE_SERROR_C_ch macroAngel Pons
2020-03-26nb/intel/sandybridge: Update commentAngel Pons
2020-03-26nb/intel/sandybridge: Rename raminit_ivy.cAngel Pons
2020-03-26nb/intel/sandybridge: Drop dead codeAngel Pons
2020-03-26nb/intel/sandybridge: Unify the code pathsAngel Pons
2020-03-26nb/intel/sandybridge: Add print for PLL_REF100_CFGAngel Pons
2020-03-26nb/intel/sandybridge: Rewrite get_FRQAngel Pons
2020-03-25nb/intel/sandybridge: Cache FRQ indexAngel Pons
2020-03-25nb/intel/sandybridge: Rewrite table accessorsAngel Pons
2020-03-25drivers/intel/gma/acpi: Add Kconfigs for backlight registersNico Huber
2020-03-25nb/intel/sandybridge: Factor out timing tablesAngel Pons
2020-03-25nb/intel/sandybridge: Use SPDX headersAngel Pons
2020-03-23nb/intel/sandybridge: Use cached CPUIDAngel Pons
2020-03-23nb/intel/sandybridge: Void MRC cache if CPUID differsAngel Pons
2020-03-23nb/intel/sandybridge: Store CPUID in ctrl structAngel Pons
2020-03-23nb/intel/sandybridge: Add warning to saved structsAngel Pons
2020-03-23nb/intel/sandybridge: Remove unnecessary declarationAngel Pons
2020-03-23nb/intel/sandybridge: Do not define tables in a headerAngel Pons
2020-03-23nb/intel/sandybridge: Reflow raminit tablesAngel Pons
2020-03-23acpi: Change Processor ACPI Name (Intel only)Christian Walter
2020-03-23nb/intel/sandybridge: Remove oddball `- 1` in tRFCAngel Pons
2020-03-22nb/intel/sandybridge: Drop spurious register writeAngel Pons
2020-03-20nb/intel/sandybridge: Deduplicate report_memory_configAngel Pons
2020-03-20nb/intel/sandybridge: Always write to PEGCTLAngel Pons
2020-03-19nb/intel/sandybridge: Use loops on DMI register groupsAngel Pons
2020-03-18nb/intel/sandybridge: Tidy up code and commentsAngel Pons
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2020-03-16nb/intel/i945/raminit: Simplify if conditionPaul Menzel
2020-03-15nb/intel/pineview: Clean up code and commentsAngel Pons
2020-03-15treewide: Replace uses of "Nehalem"Angel Pons
2020-03-15nb/intel/nehalem: Rename to ironlakeAngel Pons
2020-03-15nb/intel/i945/raminit: Use boolean type for helper variablesPaul Menzel
2020-03-15nb/intel/i945/raminit: Remove space for correct alignmentPaul Menzel
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-05 21:57:49 +0000