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path: root/src/northbridge/intel
AgeCommit message (Expand)Author
2017-10-12nb/intel/sandybridge/raminit: Fix setting scramble seed for CH1Arthur Heymans
2017-10-03nb/intel/gm45: Remove UMA alignment optimizationNico Huber
2017-10-03nb/intel/sandybridge: Refactor dram_dimm_mapping()Nico Huber
2017-09-27nb/intel/sandybridge/raminit: Improve readabilityPatrick Rudolph
2017-09-25nb/i945/raminit: Don't fall back to smbus read on failed SPD decodeArthur Heymans
2017-09-22nb/intel/x4x: Select LAPIC_MONOTONIC_TIMERArthur Heymans
2017-09-22nb/intel/i945: Add space after comma in log messagePaul Menzel
2017-09-20nb/i945/raminit: Use common ddr2 decode functionsArthur Heymans
2017-09-20nb/intel/i945/early_init.c: Replace numbers with macrosElyes HAOUAS
2017-09-14device: acpi_name() should take a const struct deviceAaron Durbin
2017-09-13nb/intel/i945/raminit.c: Replace numbers with macrosElyes HAOUAS
2017-09-13intel/i440bx: Implement EARLY_CBMEM_INIT supportKeith Hui
2017-09-10nb/intel/i945: Clear timeout bits after disabling watchdogNico Huber
2017-09-06nb/intel/i945/raminit.c: Refactor tRD selectionArthur Heymans
2017-09-05nb/intel/common: Write MRC cache at exit of BS_DEV_INITNico Huber
2017-09-02nb/intel/pineview: Enable dram remappingArthur Heymans
2017-09-01nb/intel/i440bx/debug.c: Bugfix and cleanupKeith Hui
2017-09-01intel/i440bx: Move LATE_CBMEM_INIT under mainboardKyösti Mälkki
2017-08-27nb/intel/pineview: Fix typo in DRAM timing computationArthur Heymans
2017-08-20nb/intel/x4x: Fix booting with FSB800 DDR667 combinationArthur Heymans
2017-08-20nb/intel/x4x/raminit: Rework receive enable calibrationArthur Heymans
2017-08-18nb/intel/i440bx: Compile debug.c only if CONFIG_DEBUG_RAM_SETUPKeith Hui
2017-08-14nb/intel/sandybridge/gma: Fix S3 resumePatrick Rudolph
2017-08-11nb/intel/x4x/gma.c: Probe VGA EDID on DVI-I portsArthur Heymans
2017-08-11drivers/intel/gma/opregion: migrate from nb/commonMatt DeVillier
2017-08-10nb/intel/sandybridge/raminit: Add Kconfig option for fusesPatrick Rudolph
2017-08-07nb/intel/*/gma.c: Use macros for GMBUS numbersArthur Heymans
2017-08-06sb/intel/*: Use common SMBus functionsArthur Heymans
2017-07-30intel/sandybridge: Clean VGA BIOS ids up a littleNico Huber
2017-07-30intel/sandybridge: Gather MMCONF_BASE_ADDRESS defaultsNico Huber
2017-07-24nb/intel/i440bx: Add final newline to raminit.cMartin Roth
2017-07-23northbridge/intel/i440bx: Merge RAM init routinesKeith Hui
2017-07-22northbridge/intel/i440bx: Move NB macro to i440bx.hKeith Hui
2017-07-21nb/intel/x4x: Rework programming DQ and DQS DLL timingsArthur Heymans
2017-07-21nb/intel/pineview/raminit: Refactor timings selectionArthur Heymans
2017-07-21sb/intel/i82801jx: Add correct PCI ids and change namesArthur Heymans
2017-07-13Rename __attribute__((packed)) --> __packedStefan Reinauer
2017-07-12nb/intel/sandybridge/gma: Set ASLS on S3 resumePatrick Rudolph
2017-07-12nb/intel/haswell/gma: Set ASLS on S3 resumePatrick Rudolph
2017-07-12nb/intel/fsp_sandybridge/gma: Set ASLS on S3 resumePatrick Rudolph
2017-07-12nb/intel/nehalem/gma: Set ASLS on S3 resumePatrick Rudolph
2017-07-12drv/intel/gma/opregion: Add interface for GNVS ASLB handlingPatrick Rudolph
2017-07-12nb/intel/common/gma_opregion: Use new method to update ASLSPatrick Rudolph
2017-07-06northbridge/intel/haswell: Fix undefined behaviorRyan Salsamendi
2017-07-03northbridge/intel/haswell: Fix copy paste errorRyan Salsamendi
2017-07-03northbridge/intel/haswell: Fix undefined behaviorRyan Salsamendi
2017-07-01nb/intel/i945/gma.c: Remove redefined "DISPPLANE_BGRX888"Elyes HAOUAS
2017-07-01nb/intel/i945/gma.c: Add whitespace around '<<'Elyes HAOUAS
2017-06-29nb/haswell: set ASLB gnvs to OpRegion ACPI memory addressMatt DeVillier
2017-06-28cpu/intel/pineview: Include speedstepArthur Heymans
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