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Some coreboot project code with my work
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intel
Age
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Author
2013-08-09
intel/sandybridge intel/bd82x6x: remove explicit pcie config accesses
Kyösti Mälkki
2013-08-01
Add directive __SIMPLE_DEVICE__
Kyösti Mälkki
2013-07-31
Drop unused EXTERNAL_MRC_BLOB
Stefan Reinauer
2013-07-11
Set PCI bus operations at buildtime for ramstage
Kyösti Mälkki
2013-07-10
usbdebug: Move ehci_debug_info allocation
Kyösti Mälkki
2013-07-10
FUI: reorganize include files
Ronald G. Minnich
2013-07-10
Drop some duplicates of PCI-e config functions
Kyösti Mälkki
2013-07-10
Fix MMCONF_SUPPORT_DEFAULT for ramstage
Kyösti Mälkki
2013-07-09
fox_wtm2: First step support for coreboot-based graphics startup
Ronald G. Minnich
2013-07-09
FOX_WTM2: First pass at FUI.
Ronald G. Minnich
2013-07-04
intel/i5000: Use MMCONF_SUPPORT_DEFAULT
Kyösti Mälkki
2013-07-04
Move select MMCONF_SUPPORT under northbridge (fix)
Kyösti Mälkki
2013-07-04
intel/i945: Use MMCONF_SUPPORT_DEFAULT
Kyösti Mälkki
2013-07-04
intel/sandybridge intel/ivybridge: Use MMCONF_SUPPORT_DEFAULT
Kyösti Mälkki
2013-07-03
Move select MMCONF_SUPPORT under northbridge
Kyösti Mälkki
2013-07-02
Intel GM45, 945, Sandy Bridge: Unify `delay.c` and `udelay.c`
Paul Menzel
2013-06-28
Add support to enable/disable builtin GbE (again)
Stefan Reinauer
2013-06-27
Revert "Add support to enable/disable builtin GbE"
Kyösti Mälkki
2013-06-25
intel/sch: Use MMCONF_BASE_ADDRESS
Kyösti Mälkki
2013-06-22
intel/sandybridge: Locate CBMEM TOC early in ramstage
Kyösti Mälkki
2013-06-21
Add support to enable/disable builtin GbE
Stefan Reinauer
2013-06-20
sandybridge: Store MRC cache in CBFS
Patrick Georgi
2013-06-07
i945: Add Display defines for int15h handler.
Denis 'GNUtoo' Carikli
2013-06-05
Intel 945: Select LAPIC_MONOTONIC_TIMER for X86EMU_DEBUG_TIMINGS
Denis 'GNUtoo' Carikli
2013-06-04
Move the MARK_GRAPHICS_MEM_WRCOMB to x86 architecture
Ronald G. Minnich
2013-06-03
haswell: fix overflow handling TOUUD
Aaron Durbin
2013-05-25
Intel GM45, 945, SNB: Move `multiply_to_tsc()` to `tsc.h`
Ronald G. Minnich
2013-05-23
Intel Sandy Bridge: udelay.c: Change comparison from <= to <
Paul Menzel
2013-05-22
intel/gm45: Add more debug output to read/write training
Nico Huber
2013-05-22
intel/gm45: Handle overflows during DDR3 write training
Nico Huber
2013-05-22
intel/gm45: Refactor DDR3 write training
Nico Huber
2013-05-22
intel/gm45: Handle overflows during DDR3 read training
Nico Huber
2013-05-22
intel/gm45: Refactor DDR3 read training
Nico Huber
2013-05-22
intel/gm45: Fix interpretation of VT-d disable bit
Nico Huber
2013-05-21
intel/i5000: Remove unused copy of udelay.c
Nico Huber
2013-05-10
Get rid of a number of __GNUC__ checks
Stefan Reinauer
2013-05-10
northbridge/intel/i5000/udelay.c: Remove unused header `console.h`
Paul Menzel
2013-05-10
Drop prototype guarding for romcc
Stefan Reinauer
2013-05-07
haswell: use tsc for udelay()
Aaron Durbin
2013-05-01
boot: remove cbmem_post_handling()
Aaron Durbin
2013-04-18
Intel i945: ACPI: Add _OSC method
Denis 'GNUtoo' Carikli
2013-04-16
Lenovo ThinkPad X60: Add Native VGA init.
Denis 'GNUtoo' Carikli
2013-04-03
sandybridge: enable ROM caching
Aaron Durbin
2013-03-29
sandybridge: add option to mark graphics memory write-combining.
Aaron Durbin
2013-03-29
haswell: add option to mark graphics memory write-combining.
Aaron Durbin
2013-03-29
x86: add new mtrr implementation
Aaron Durbin
2013-03-23
resources: introduce reserved_ram_resource()
Aaron Durbin
2013-03-22
haswell: use dynamic cbmem
Aaron Durbin
2013-03-22
coreboot: dynamic cbmem requirement
Aaron Durbin
2013-03-22
x86: Unify arch/io.h and arch/romcc_io.h
Stefan Reinauer
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