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path: root/src/northbridge/intel
AgeCommit message (Expand)Author
2013-08-09intel/sandybridge intel/bd82x6x: remove explicit pcie config accessesKyösti Mälkki
2013-08-01Add directive __SIMPLE_DEVICE__Kyösti Mälkki
2013-07-31Drop unused EXTERNAL_MRC_BLOBStefan Reinauer
2013-07-11Set PCI bus operations at buildtime for ramstageKyösti Mälkki
2013-07-10usbdebug: Move ehci_debug_info allocationKyösti Mälkki
2013-07-10FUI: reorganize include filesRonald G. Minnich
2013-07-10Drop some duplicates of PCI-e config functionsKyösti Mälkki
2013-07-10Fix MMCONF_SUPPORT_DEFAULT for ramstageKyösti Mälkki
2013-07-09fox_wtm2: First step support for coreboot-based graphics startupRonald G. Minnich
2013-07-09FOX_WTM2: First pass at FUI.Ronald G. Minnich
2013-07-04intel/i5000: Use MMCONF_SUPPORT_DEFAULTKyösti Mälkki
2013-07-04Move select MMCONF_SUPPORT under northbridge (fix)Kyösti Mälkki
2013-07-04intel/i945: Use MMCONF_SUPPORT_DEFAULTKyösti Mälkki
2013-07-04intel/sandybridge intel/ivybridge: Use MMCONF_SUPPORT_DEFAULTKyösti Mälkki
2013-07-03Move select MMCONF_SUPPORT under northbridgeKyösti Mälkki
2013-07-02Intel GM45, 945, Sandy Bridge: Unify `delay.c` and `udelay.c`Paul Menzel
2013-06-28Add support to enable/disable builtin GbE (again)Stefan Reinauer
2013-06-27Revert "Add support to enable/disable builtin GbE"Kyösti Mälkki
2013-06-25intel/sch: Use MMCONF_BASE_ADDRESSKyösti Mälkki
2013-06-22intel/sandybridge: Locate CBMEM TOC early in ramstageKyösti Mälkki
2013-06-21Add support to enable/disable builtin GbEStefan Reinauer
2013-06-20sandybridge: Store MRC cache in CBFSPatrick Georgi
2013-06-07i945: Add Display defines for int15h handler.Denis 'GNUtoo' Carikli
2013-06-05Intel 945: Select LAPIC_MONOTONIC_TIMER for X86EMU_DEBUG_TIMINGSDenis 'GNUtoo' Carikli
2013-06-04Move the MARK_GRAPHICS_MEM_WRCOMB to x86 architectureRonald G. Minnich
2013-06-03haswell: fix overflow handling TOUUDAaron Durbin
2013-05-25Intel GM45, 945, SNB: Move `multiply_to_tsc()` to `tsc.h`Ronald G. Minnich
2013-05-23Intel Sandy Bridge: udelay.c: Change comparison from <= to <Paul Menzel
2013-05-22intel/gm45: Add more debug output to read/write trainingNico Huber
2013-05-22intel/gm45: Handle overflows during DDR3 write trainingNico Huber
2013-05-22intel/gm45: Refactor DDR3 write trainingNico Huber
2013-05-22intel/gm45: Handle overflows during DDR3 read trainingNico Huber
2013-05-22intel/gm45: Refactor DDR3 read trainingNico Huber
2013-05-22intel/gm45: Fix interpretation of VT-d disable bitNico Huber
2013-05-21intel/i5000: Remove unused copy of udelay.cNico Huber
2013-05-10Get rid of a number of __GNUC__ checksStefan Reinauer
2013-05-10northbridge/intel/i5000/udelay.c: Remove unused header `console.h`Paul Menzel
2013-05-10Drop prototype guarding for romccStefan Reinauer
2013-05-07haswell: use tsc for udelay()Aaron Durbin
2013-05-01boot: remove cbmem_post_handling()Aaron Durbin
2013-04-18Intel i945: ACPI: Add _OSC methodDenis 'GNUtoo' Carikli
2013-04-16Lenovo ThinkPad X60: Add Native VGA init.Denis 'GNUtoo' Carikli
2013-04-03sandybridge: enable ROM cachingAaron Durbin
2013-03-29sandybridge: add option to mark graphics memory write-combining.Aaron Durbin
2013-03-29haswell: add option to mark graphics memory write-combining.Aaron Durbin
2013-03-29x86: add new mtrr implementationAaron Durbin
2013-03-23resources: introduce reserved_ram_resource()Aaron Durbin
2013-03-22haswell: use dynamic cbmemAaron Durbin
2013-03-22coreboot: dynamic cbmem requirementAaron Durbin
2013-03-22x86: Unify arch/io.h and arch/romcc_io.hStefan Reinauer