summaryrefslogtreecommitdiff
path: root/src/northbridge/intel
AgeCommit message (Expand)Author
2016-01-20nb/intel/pineview: Use macro names for memory base registersDamien Zammit
2016-01-18nb/intel/pineview: Fix decode_pciebar()Damien Zammit
2016-01-18header files: Fix guard name comments to match guard namesMartin Roth
2016-01-17intel/sandybridge/raminit: fix ODT settingPatrick Rudolph
2016-01-14nb/intel/gm45: Backport configuration of panel power timingsNico Huber
2016-01-14nb/intel/gm45: Drop unnecessary panel power handlingNico Huber
2016-01-13intel/northbridge/sandy: raminit code cleanupPatrick Rudolph
2016-01-13northbridge/intel/x4x: clean up includesMartin Roth
2016-01-12nb/intel/gm45: Convert gma.c to `if (IS_ENABLED(` styleNico Huber
2016-01-07Correct some common spelling mistakesMartin Roth
2015-12-31nb/intel/gm45: Export low-power and (SFF) optionsNico Huber
2015-12-30northbridge/intel/x4x: Native raminitDamien Zammit
2015-12-29northbridge/intel/x4x: Intel 4-series northbridge supportDamien Zammit
2015-12-16northbridge/intel ACPI: Remove unused Local methodMartin Roth
2015-12-15x86 acpi: remove ALIGN_CURRENT macroAaron Durbin
2015-12-06Remove #ifdef checks on Kconfig symbolsMartin Roth
2015-12-02northbridge/intel/pineview: Add native raminitDamien Zammit
2015-12-02northbridge/intel/pineview: Add remaining boilerplate code for northbridgeDamien Zammit
2015-11-24northbridge/intel/pineview: Add minimal Pineview northbridgeDamien Zammit
2015-11-19nb/intel/sandybridge/raminit: Factor out code into toggle_io_resetPatrick Rudolph
2015-11-19nb/intel/sandybridge/raminit: Comment the codePatrick Rudolph
2015-11-18nb/intel/sandybridge: Fix PEG disablementPatrick Rudolph
2015-11-18nb/intel/sandybridge/northbridge: Initialize uma_memory_base in all casesPatrick Rudolph
2015-11-18northbridge/intel/sandybridge: Fix random raminit failuresPatrick Rudolph
2015-11-17northbridge/intel/fsp_sandybridge: remove blank lineMartin Roth
2015-11-10northbridge/intel: Add i89xx header fileMarc Jones
2015-11-05nb/intel/sandybridge: Limit GFX workaround to Sandy BridgeNico Huber
2015-11-04nb/intel/sandybridge: Add ACPI DMAR tableNico Huber
2015-11-04nb/intel/sandybridge: Enable basic IOMMU supportNico Huber
2015-11-04ACPI: Make DMAR flags settableNico Huber
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-30Drop northbridge/i440lxStefan Reinauer
2015-10-29nb/intel/sandybridge/gma: add disable functionPatrick Rudolph
2015-10-23Intel: Move MCRS ResourceTemplate outside of _CRS methodMartin Roth
2015-10-22Revert "Remove sandybridge and ivybridge FSP code path"Martin Roth
2015-10-15cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc
2015-10-14Revert "Remove FSP Rangeley SOC and mohonpeak board support"Martin Roth
2015-10-12gma: Consolidate Intel IGD ACPI code some moreNico Huber
2015-10-11Kill lvds_num_lanesVladimir Serbinenko
2015-10-11Derive lvds_dual_channel from EDID timings.Vladimir Serbinenko
2015-10-09nb/intel/sandybridge/raminit: Add edge write discovery checkPatrick Rudolph
2015-10-09northbridge/intel/sandybridge: Do not disable PEG by defaultPatrick Rudolph
2015-10-09northbridge/intel/sandybridge: Enable PEG clock-gating on demandPatrick Rudolph
2015-10-04northbridge/intel/nehalem: Fix native VGA initNicolas Reinecke
2015-10-03Remove FSP Rangeley SOC and mohonpeak board supportAlexandru Gagniuc
2015-10-03Remove sandybridge and ivybridge FSP code pathAlexandru Gagniuc
2015-10-03sandybridge ivybridge: Treat native init as first class citizenAlexandru Gagniuc
2015-10-01northbridge/intel/gm45: Fix native VGA initAudrey Pearson
2015-09-24coreboot: move TS_END_ROMSTAGE to one spotAaron Durbin
2015-09-07intel/sandybridge: Do not guard native VGA init by #ifdefsAlexandru Gagniuc