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path: root/src/northbridge/intel
AgeCommit message (Expand)Author
2017-05-11nb/intel/x4x: Define and use default MMCONF_BASE_ADDRESSArthur Heymans
2017-05-11nb/intel/gm45: Define and use default MMCONF_BASE_ADDRESSArthur Heymans
2017-05-11nb/intel/i945: Define and use a default MMCONF_BASE_ADDRESSArthur Heymans
2017-05-10nb/intel/x4x: Add support for second PEG slotArthur Heymans
2017-05-09nb/x4x: Do not enable IGD when not supportedArthur Heymans
2017-05-09nb/intel/x4x: Don't run NGI if IGD has not been assigned VGA cyclesArthur Heymans
2017-05-09nb/x4x: Add ramstage IGD disable functionArthur Heymans
2017-05-09nb/x4x/nortbridge.c: Compute TSEG resource allocation dynamicallyArthur Heymans
2017-05-08nb/x4x/raminit.c: Remove ME locking codeArthur Heymans
2017-05-05nb/intel/sandybridge/early_init: Use register namePatrick Rudolph
2017-05-05nb/intel/sandybridge/romstage: Use register namePatrick Rudolph
2017-05-04nb/intel/x4x/raminit: Change reset type on incomplete raminit resetArthur Heymans
2017-05-03nb/intel/gm45: Set display backlight according to EDID stringArthur Heymans
2017-05-03nb/intel/gm45/gma.c: Decode EDID before NGI pathArthur Heymans
2017-05-01nb/intel/sandybridge/gma: Set up OpRegion in nb codePatrick Rudolph
2017-05-01nb/intel/nehalem/gma: Set up OpRegion in nb codePatrick Rudolph
2017-05-01nb/intel/fsp_sandybridge/gma: Set up OpRegion in nb codePatrick Rudolph
2017-04-26nb/pineview/raminit: Don't do Jedec init on resume from S3Arthur Heymans
2017-04-25lib: provide clearer devicetree semanticsAaron Durbin
2017-04-24nb/intel/pineview: Select RELOCATABLE_RAMSTAGEArthur Heymans
2017-04-24nb/intel/pineview: Move to early cbmemArthur Heymans
2017-04-24nb/pineview/raminit: Fix raminit failing on hot reset pathArthur Heymans
2017-04-24northbridge/haswell: clean up native graphics init codeMatt DeVillier
2017-04-22nb/intel/pineview/raminit: Fix CONFIG_DEBUG_RAM_SETUP=y not compilingArthur Heymans
2017-04-19console: Add convenient debug level macros for raminitNico Huber
2017-04-19nb/intel/gm45: Hide some output behind DEBUG_RAM_SETUPNico Huber
2017-04-15nb/intel/x4x/Kconfig: Don't fix CBFS_SIZE on i82801gx southbridgeArthur Heymans
2017-04-14nb/intel/i945: Fix PEG port on 945gcArthur Heymans
2017-04-07nb/intel/i945: Move INTEL_EDIDPatrick Rudolph
2017-04-07nb/intel/sandybridge/raminit: Fix odt stretchPatrick Rudolph
2017-04-07nb/intel/sandybridge/raminit: Always run quick_ram_checkPatrick Rudolph
2017-04-07nb/intel/sandybridge/raminit: Reduce log levelPatrick Rudolph
2017-04-07nb/intel/sandybridge/raminit: Fix normalize_trainingPatrick Rudolph
2017-04-04nb/intel/sandybridge/raminit: Add default valuesPatrick Rudolph
2017-04-04nb/intel/sandybridge/raminit: Add debugging outputPatrick Rudolph
2017-04-04nb/intel/sandybridge/raminit: Add 100MHz refclock supportPatrick Rudolph
2017-04-04nb/intel/sandybridge/raminit: Use Ivy Bridge specific valuesPatrick Rudolph
2017-04-03nb/intel: Deduplicate vbt headerPatrick Rudolph
2017-03-28vboot: Select SoC-specific configuration for all Chrome OS boardsJulius Werner
2017-03-27nb/intel/sandybridge: Use DIV_ROUND_UP macro to select timingsArthur Heymans
2017-03-24nb/intel/i945: Fix SPD dumpsPaul Menzel
2017-03-22nb/intel/i945: Fix errors found by checkpatch.plArthur Heymans
2017-03-21nb/x4x: Move checkreset before SPD readingArthur Heymans
2017-03-21nb/intel/x4x: Fix issues found by checkpatch.plArthur Heymans
2017-03-18nb/i945/gma.c: Refactor panel setupArthur Heymans
2017-03-10northbridge/intel/i440bx: Align codePaul Menzel
2017-03-08nb/intel/nehalem/raminit.c: Refine broken commentStefan Tauner
2017-03-02nb/i945: Clean "Programming DLL Timings" functionElyes HAOUAS
2017-03-01nb/intel/i945: Fix sdram_enhanced_addressing_mode for channel1Elyes HAOUAS
2017-02-22intel/i945: Fix up whitespace and indentationPaul Menzel
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