index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
northbridge
/
intel
Age
Commit message (
Expand
)
Author
2016-05-08
intel/pineview: Don't try to store 34 bits in 32
Stefan Reinauer
2016-05-04
nb/intel/sandybridge/raminit: support calling dram_freq multiple times
Patrick Rudolph
2016-05-04
nb/intel/sandybridge/raminit: add additional fallbacks
Patrick Rudolph
2016-05-04
nb/intel/gm45: Fix native text mode initialization
Nick High
2016-04-29
nb/intel/sandybridge/raminit: fix regression "always use mrccache"
Patrick Rudolph
2016-04-10
nb/intel/sandybridge/raminit: always use mrccache
Patrick Rudolph
2016-04-05
nb/intel/sandybridge/raminit: die in toplevel function
Patrick Rudolph
2016-04-05
nb/intel/sandybridge/raminit: prepare raminit for fallback
Patrick Rudolph
2016-03-30
nb/intel/sandybridge/raminit: move ram training into seperate function
Patrick Rudolph
2016-03-29
nb/intel/sandybridge/raminit: move dimm_info into ramctr_timing
Patrick Rudolph
2016-03-16
cpu/x86/mtrr: move cache_ramstage() to its only user
Aaron Durbin
2016-03-13
northbridge/intel/i3100: Unify UDELAY selection
Stefan Reinauer
2016-03-13
northbridge/intel/i82810: Unify UDELAY selection
Stefan Reinauer
2016-03-12
northbridge/intel/i82830: Unify UDELAY selection
Stefan Reinauer
2016-03-11
northbridge/intel: move mrccache.c of sandybridge + haswell to common
Alexander Couzens
2016-03-11
northbridge/intel: move mrc_cache definition into a common header
Alexander Couzens
2016-03-11
nortbridge/sandybridge/mrccache: parse the return code of flash->write
Alexander Couzens
2016-03-11
northbridge/i945/gma: Re-enable NVRAM tft_brightness
Alexander Couzens
2016-03-10
northbridge/intel/i440bx: Unify UDELAY selection
Stefan Reinauer
2016-03-09
northbridge/intel/gm45: Use TSC for ramstage timer per default
Stefan Reinauer
2016-03-05
sandybridge/gma_lvds: support both Sandy&Ivy on one board
Iru Cai
2016-03-03
nb/intel/sandybridge/raminit: Fill SMBIOS type17 info
Patrick Rudolph
2016-03-02
nb/intel/sandybridge/romstage: Read fuse bits for max MEM Clk
Patrick Rudolph
2016-03-02
nb/intel/sandybridge/raminit: Make discover_timC_write non cyclic
Patrick Rudolph
2016-02-28
northbridge/intel: add missing #include guards
Iru Cai
2016-02-26
nb/intel/sandybridge/raminit: Adjust timB to prevent overflow
Patrick Rudolph
2016-02-26
tree wide: Convert "if (CONFIG_.*_TPM.*)" to "if (IS_ENABLED(...))"
Denis 'GNUtoo' Carikli
2016-02-20
nb/intel/sandybridge/raminit: Add XMP support
Patrick Rudolph
2016-02-19
nb/intel/sandybridge/raminit: Improve logging
Patrick Rudolph
2016-02-18
nb/intel/sandybridge: Start PEG link training
Patrick Rudolph
2016-02-18
southbridge/intel/bd82x6x: Use common gpio.c
Patrick Rudolph
2016-02-16
nb/intel/sandybridge/raminit: Add shift offset
Patrick Rudolph
2016-02-13
sandybridge: Always include MRC if not using native RAM init.
Vladimir Serbinenko
2016-02-12
Make MRC vs native a config rather than making a separate chipset for it.
Vladimir Serbinenko
2016-02-12
Merge sandy/ivybridge romstage flow for MRC and non-MRC.
Vladimir Serbinenko
2016-02-10
Kconfig: Move defaults for CBFS_SIZE
Martin Roth
2016-02-09
sandybridge: Set all native gfx-related options in northbridge code.
Vladimir Serbinenko
2016-02-09
ivy: Add a possiblity for mainboard early init.
Vladimir Serbinenko
2016-02-09
Revert "northbridge/intel/peg: Disable unused ports"
Nico Huber
2016-02-04
northbridge/intel/peg: Disable unused ports
Patrick Rudolph
2016-02-04
nb/intel/sandybridge/raminit: Fix two dimms per channel
Patrick Rudolph
2016-01-29
Revert "northbridge/intel/sandybridge: Fix random raminit failures"
Vladimir Serbinenko
2016-01-29
nb/intel/x4x: Move to early cbmem
Damien Zammit
2016-01-29
nb/intel/x4x: Cleanup gma.c
Damien Zammit
2016-01-29
nb/intel/x4x: Tidy up raminit and fix msbpos() function
Damien Zammit
2016-01-29
nb/intel/x4x: Tidy up northbridge
Damien Zammit
2016-01-29
nb/intel/x4x: Fix memory hole with both channels populated
Damien Zammit
2016-01-28
nb/intel/pineview: Native VGA init (CRT)
Damien Zammit
2016-01-26
nb/intel/pineview: Increase MMCONF decoding to 256 busses
Damien Zammit
2016-01-20
nb/intel/pineview: Use macro names for memory base registers
Damien Zammit
[next]