| Age | Commit message (Expand) | Author |
|---|---|---|
| 2003-10-02 | Some timing in here, but we don't set; it breaks. | Ronald G. Minnich |
| 2003-10-02 | ram size now set from SPD. | Ronald G. Minnich |
| 2003-10-02 | First SPD code in and working! | Ronald G. Minnich |
| 2003-10-02 | success. It boots as a bproc slave now. | Ronald G. Minnich |
| 2003-09-30 | The epia now works. | Ronald G. Minnich |
| 2003-09-27 | ok that's it. I think this might work. | Ronald G. Minnich |
| 2003-09-27 | a few tweaks etc. | Ronald G. Minnich |
| 2003-09-26 | it's getting through the 8601 but the values are still not right. | Ronald G. Minnich |
| 2003-09-26 | something is wrong here but not sure what. | Ronald G. Minnich |
| 2003-09-26 | just to get us back where we were. | Ronald G. Minnich |
| 2003-09-26 | via epia; also yh lu tyan. | Ronald G. Minnich |
| 2003-09-25 | first cut at 8601 support | Ronald G. Minnich |
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index : coreboot | |
| Some coreboot project code with my work | vimacs |
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