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AgeCommit message (Expand)Author
2018-04-20pci: Move inline PCI functions to pci_ops.hPatrick Rudolph
2018-04-17nb/intel/x4x/rcven.c: Change the verbosity of some messagesArthur Heymans
2018-04-17nb/intel/x4x: Add a convenient macro to loop over bytelanesArthur Heymans
2018-04-17nb/intel/x4x: Clarify the raminit memory mappingArthur Heymans
2018-04-17nb/intel/x4x: Refactor setting default dll settingsArthur Heymans
2018-04-17nb/intel/x4x: Use SPI flash to cache raminit resultsArthur Heymans
2018-04-16nb/intel/i945/gma: Log native graphics init in level INFOPaul Menzel
2018-04-16nb/intel/i945/gma: Fix aligment of equal signPaul Menzel
2018-04-16nb/intel/sandybridge: support more XMP timingsDan Elkouby
2018-04-13nb/intel/sandybridge/peg: Add PEG driver stubPatrick Rudolph
2018-04-11Revert "model_206ax: Use parallel MP init"Arthur Heymans
2018-04-11model_206ax: Use parallel MP initArthur Heymans
2018-04-10cpu/intel/sandybridge: Put stage cache into TSEGArthur Heymans
2018-04-09intel/nehalem post-car: Use postcar_frame for MTRR setupKyösti Mälkki
2018-04-04nb/intel/gm45/raminit: Use CxDRT*_MCHBAR instead of magic numbersJonathan Neuschäfer
2018-03-28nb/intel/gm45: Allocate a 8M TSEG regionArthur Heymans
2018-03-08nb/intel/haswell;sb/intel/lynxpoint: Enable VT-d and X2APICMatt DeVillier
2018-03-08nb/intel/haswell: Generate ACPI DMAR tableMatt DeVillier
2018-03-03nb/intel/i945/gma: Log configured VGA modePaul Menzel
2018-02-27sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common locationArthur Heymans
2018-02-22device/ddr2,ddr3: Rename and move a few thingsArthur Heymans
2018-02-20nb/x4x/raminit_ddr2: Refactor clock configuration slightlyJonathan Neuschäfer
2018-02-06nb/intel/sandybridge: Always use the same MMCONF_BASE_ADDRESSArthur Heymans
2018-02-06nb/intel/haswell: Use the common MRC cache driverArthur Heymans
2018-02-02nb/intel/sandybridge: Add required space before opening parenthesis '('Elyes HAOUAS
2018-01-31nb/intel/*.h: Remove left-over register definitionsPatrick Rudolph
2018-01-26nb/intel/sandybridge: Use common mrc cache functionsArthur Heymans
2018-01-24AGESA f15 cimx/sb700: Remove unused chips codeKyösti Mälkki
2018-01-23binaryPI: Move agesawrapper.h headerKyösti Mälkki
2018-01-23AGESA_LEGACY: Apply final cleanup and file removalsKyösti Mälkki
2018-01-23sb/intel/bd82x6x: Reduce function-disable messNico Huber
2018-01-23nb/intel/i945: Use ESMRAMC instead of 0x9eElyes HAOUAS
2018-01-18Intel i82810 boards & chips: Remove - using LATE_CBMEM_INITKyösti Mälkki
2018-01-18security/tpm: Change TPM naming for different layers.Philipp Deppenwiese
2018-01-18security/tpm: Move tpm TSS and TSPI layer to security sectionPhilipp Deppenwiese
2018-01-17vx900: decode the whole ROMLubomir Rintel
2018-01-15Intel i82830 boards & chips: Remove - using LATE_CBMEM_INITMartin Roth
2018-01-15Intel i3100 boards & chips: Remove - using LATE_CBMEM_INITMartin Roth
2018-01-15Intel i5000 board & chips: Remove - using LATE_CBMEM_INITMartin Roth
2018-01-15Intel i855 board & chips: Remove - using LATE_CBMEM_INITMartin Roth
2018-01-15AMD GX2 boards & chips: Remove - using LATE_CBMEM_INITMartin Roth
2018-01-15vx900: skip remap of high memory ranges if unnecessaryLubomir Rintel
2018-01-15vx900: map the SPI controllerLubomir Rintel
2018-01-15vx900: fix format strings for DEBUG_RAM_SETUP=yLubomir Rintel
2018-01-05nb/intel/x4x: Disable watchdog, halt TCO timer and clear timeoutArthur Heymans
2017-12-20intel/gma: fix RPNFREQ_VAL bitmaskFelix Held
2017-12-19nb/intel/nehalem/gma: Drop stale pre-pocessor guardsNico Huber
2017-12-16nb/x4x/raminit: Rewrite SPD decode and timing selectionArthur Heymans
2017-12-12nb/intel/x4x/rcven.c: Fix programming coarse offsetArthur Heymans
2017-12-09intel/i440bx: Correct RAM init programmingKeith Hui
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