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path: root/src/northbridge
AgeCommit message (Expand)Author
2020-06-03northbridge/intel/sandybridge: Mask lower 20 bits of TOLUD and TOLM in hostbr...Furquan Shaikh
2020-06-03northbridge/intel/sandybridge: Update hostbridge.asl to ASL2.0 syntaxFurquan Shaikh
2020-06-03northbridge/intel/haswell: Mask lower 20 bits of TOLUD and TOLM in hostbridge...Furquan Shaikh
2020-06-03northbridge/intel/haswell: Update hostbridge.asl to ASL2.0Furquan Shaikh
2020-06-02src: Remove redundant includesElyes HAOUAS
2020-06-02src: Remove unused 'include <bootmode.h>'Elyes HAOUAS
2020-06-02src: Remove unused '#include <cpu/x86/lapic.h>'Elyes HAOUAS
2020-05-27intel/gma: Only enable bus mastering if we are going to use itNico Huber
2020-05-27intel/gma: Don't bluntly enable I/ONico Huber
2020-05-27drivers/intel/gma: Move IGD OpRegion to CBMEMNico Huber
2020-05-26northbridge/intel/i945: Mark legacy VGA memory as reservedFurquan Shaikh
2020-05-26northbridge/amd: Keep using old resource allocatorFurquan Shaikh
2020-05-26device_util,agesa/family14: Do not consider unassigned resources in find_pci_...Furquan Shaikh
2020-05-26nb/intel: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS
2020-05-21nb/intel/sandybridge: Use the new IOSAV struct APIAngel Pons
2020-05-21nb/intel/sandybridge: Drop unused parametersAngel Pons
2020-05-21nb/intel/sandybridge: Redefine IOSAV_SUBSEQUENCEAngel Pons
2020-05-21nb/intel/sandybridge: Truncate IOSAV subseq gapsAngel Pons
2020-05-21nb/intel/sandybridge: Replace macros with functionsAngel Pons
2020-05-21nb/intel/sandybridge: Refactor IOSAV_RUN_ONCEAngel Pons
2020-05-21nb/intel/sandybridge: Refactor IOSAV_SUBSEQUENCE againAngel Pons
2020-05-19nb/intel/sandybridge: Do not hardcode resource indicesAngel Pons
2020-05-19nb/intel/sandybridge: Correct IOSAV register notesAngel Pons
2020-05-18nb/intel/sandybridge: Use or-based logic for RANKSELAngel Pons
2020-05-18nb/intel/sandybridge: Program IOSAV with macrosAngel Pons
2020-05-18nb/intel/sandybridge: Add and use BROADCAST_CH for IOSAVAngel Pons
2020-05-18nb/intel: Const'ify pci_devfn_t devicesElyes HAOUAS
2020-05-18src: Remove leading blank lines from SPDX headerElyes HAOUAS
2020-05-14nb/intel/i440bx: add resources during read_resources()Furquan Shaikh
2020-05-14nb/intel/sandybridge: add resources during read_resources()Aaron Durbin
2020-05-13src: Remove unused '#include <stddef.h>'Elyes HAOUAS
2020-05-13src: Remove unused '#include <stdint.h>'Elyes HAOUAS
2020-05-12device/pci_device: Extract pci_domain_set_resources from SOCRaul E Rangel
2020-05-12nb/intel/i440bx: Drop mainboard_enable_serial()Keith Hui
2020-05-12nb/intel/sandybridge: Reorder IOSAV writesAngel Pons
2020-05-12nb/intel/sandybridge: Reorder register writeAngel Pons
2020-05-11treewide: Replace BSD-3-Clause and ISC headers with SPDX headersPatrick Georgi
2020-05-11treewide: split off license text, remove extra copyright noticesPatrick Georgi
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-09src/: Replace GPL boilerplate with SPDX headersPatrick Georgi
2020-05-09vboot: Clean up pre-RAM use of vboot_recovery_mode_enabled()Julius Werner
2020-05-08nb/intel/haswell/northbridge.c: Fix typoAngel Pons
2020-05-08northbridge/*/Kconfig: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS
2020-05-06treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi
2020-05-06treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi
2020-05-04nb/intel/i945/memmap: Convert to 96 characters line lengthElyes HAOUAS
2020-05-04nb/intel/i440bx: Ready raminit for S3 resume pathKeith Hui
2020-05-04nb/intel/i440bx: Use SPDX for remaining filesKeith Hui
2020-05-04nb/intel/i440bx: Drop northbridge.hKeith Hui
2020-05-04nb/intel/i440bx: Resolve a SMP-raminit TODOKeith Hui
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