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Some coreboot project code with my work
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northbridge
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Author
2010-11-01
Change Geode GX2 to use the auto DRAM detect code from Geode LX.
Nils Jacobs
2010-11-01
Remove some unused code.
Nils Jacobs
2010-11-01
GX2: Clean up some white space and comments.
Nils Jacobs
2010-11-01
GX2: Change MSR register numbers into more descriptive names.
Nils Jacobs
2010-10-26
Convert some comments to proper Doxygen syntax.
Uwe Hermann
2010-10-19
Correct spelling of "spacing" (in comments).
Jonathan Kollasch
2010-10-19
Revision 5966 changed the end of line style of the 3 modified files. This cha...
Scott Duplichan
2010-10-19
When debug logging is enabled, a message such as '* AP 02 timed out:02010501'
Scott Duplichan
2010-10-13
Remove various .c #includes from Intel i810/i82801ax/i82801bx boards.
Uwe Hermann
2010-10-13
Convert all Intel i810 boards to CAR.
Uwe Hermann
2010-10-13
Trivial. Clean up code and add some comments.
Zheng Bao
2010-10-12
Move translate_spd_to_i82810[] from .h to .c file (trivial).
Uwe Hermann
2010-10-12
We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it.
Uwe Hermann
2010-10-11
Factor out a few commonly duplicated functions from northbridge.c.
Uwe Hermann
2010-10-09
Remove various .c #includes from Intel 440BX/82371EB boards.
Uwe Hermann
2010-10-09
Trivial. Spell checking.
Zheng Bao
2010-10-09
Trivial. Spell checking.
Zheng Bao
2010-10-08
Trivial. Spell checking.
Zheng Bao
2010-10-08
Trivial. Fix the typo.
Zheng Bao
2010-10-07
Remove duplicate line from pci_ids.h.
Jonathan Kollasch
2010-10-06
Convert all Intel 440BX boards to Cache-as-RAM (CAR).
Uwe Hermann
2010-10-05
Use %p instead of %x to print void *.
Jonathan Kollasch
2010-10-05
Remove lib/ramtest.c-include from all CAR boards.
Patrick Georgi
2010-10-02
Fix spelling/typos in comments.
Jonathan Kollasch
2010-10-01
Move CACHE_AS_RAM_ADDRESS_DEBUG out of romstage.c into Kconfig,
Patrick Georgi
2010-10-01
Make i945/raminit.c:fsbclk() return u16 rather than int
Peter Stuge
2010-10-01
Split NORTHBRIDGE_INTEL_I945 into more precise _I945GC and _I945GM
Peter Stuge
2010-10-01
Move several i945 config #defines from romstage.c to Kconfig.
Patrick Georgi
2010-10-01
Trivial. Re-indent the code.
Zheng Bao
2010-09-30
Rename build system variables to be more intuitive, and
Patrick Georgi
2010-09-28
Trivial. re-Indent the code.
Zheng Bao
2010-09-27
Obviously missing brackets.
Xavi Drudis Ferran
2010-09-25
Mark read-only data as read-only, so the global vars test doesn't fail on it.
Patrick Georgi
2010-09-25
Various CONFIG_DEBUG_RAM_SETUP related fixes (trivial).
Uwe Hermann
2010-09-25
Keep the mc146818rtc.h include close to the option table include where
Myles Watson
2010-09-25
- Fix race condition in option_table.h generation by moving the include
Stefan Reinauer
2010-09-21
Complete the code which was missing.
Zheng Bao
2010-09-21
Fix the typo. Field DisAutoRefresh is in DramTimngHi.
Zheng Bao
2010-09-20
A number of cleanups for 440BX raminit code.
Keith Hui
2010-09-13
Add reserved areas for fam10.
Myles Watson
2010-09-13
Port k8 UMA handling to fam10.
Myles Watson
2010-09-13
Fix a typo reported by Sylvain Hitier.
Myles Watson
2010-09-13
Convert i945 boards to use reserved resources instead of directly adding
Myles Watson
2010-09-10
Move memory type information out of some AMD sockets.
Myles Watson
2010-09-09
Please find appended. This patch gets rid of the %gs magic altogether,
Arne Georg Gleditsch
2010-09-09
Also improve boot time on AMD for the DDR3 code path.
Arne Georg Gleditsch
2010-09-09
Apparently, it's not crucial to clear this at the exact moment we switch
Arne Georg Gleditsch
2010-09-05
Trivial. Currently the max frequency is preset as 400Mhz. We need to set a
Zheng Bao
2010-09-04
AMD DDR2 and DDR3 MCT function InitPhyCompensation() compliant with AGESA code.
Kerry She
2010-09-02
Trivial warning fix for adl855pc.
Myles Watson
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