summaryrefslogtreecommitdiff
path: root/src/northbridge
AgeCommit message (Collapse)Author
2014-08-22lenovo/x200: Move video ASL code to northbridge.Vladimir Serbinenko
Change-Id: I58760500252e78da947685c18201b6d446368333 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6729 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-21Merge LCD on nehalemVladimir Serbinenko
Change-Id: I09852ea56495da17e7607064d74d98f2296f34b1 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6721 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-21Merge LCD on sandy/ivyVladimir Serbinenko
Change-Id: Ibf66d46f47fe465cc805f85de818a77327cd7258 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6722 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-21i945: Support text mode gfx initVladimir Serbinenko
Change-Id: I952fdb113e2696785695b416d9292b7107099994 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6723 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-21i945/gma: don't map the page tableVladimir Serbinenko
Change-Id: I20fb5323cde1f83a3d3adc98251b2f31de25ed24 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6718 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-21i945: Remove GTT avoidance offset.Vladimir Serbinenko
Not needed anymore with GTT at the end of range. Change-Id: I57b02c7d605d3c43ac92bd744bb6472e3c3471e2 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6717 Tested-by: build bot (Jenkins) Reviewed-by: Francis Rowe <info@gluglug.org.uk> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-08-20intel/i945/gma: Place GTT below top of memoryPaul Menzel
Since commit 17fec8a0 [1] drm/i915: Use Graphics Base of Stolen Memory on all gen3+ present in the Linux kernel since version 3.12, 3D does not work anymore [2]. Comparing the graphics registers, in this case that means output of `intel_reg_dumper`, the vendor Video BIOS is setting the register PGTBL_CTL/PGETBL_CTL, only documented in the i965 datasheet [3], to `0x3ffc0001` on a system with 1 GB of RAM, while native graphics init sets it to `0x3f800001`. Currently native graphis init sets the GTT right above the base address of stolen memory. The Video BIOS sets it below the top of memory. The Linux Intel driver expects it to be below top of memory, so do it this way, by setting the address to TOM minus the size of the GTT, which is hardcoded to 256 KiB. As `PGETBL_CTL` is zero by default, reading its value in the beginning is not necessary and is only confusing. Make it clear that the code calculates the value. There is still a PTE error reported during boot, but 3D works with Linux 3.12+ and no user visible problems are shown. [1] https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=17fec8a08698bcab98788e1e89f5b8e7502ababd [2] https://bugs.freedesktop.org/show_bug.cgi?id=79038 [3] https://01.org/linuxgraphics/sites/default/files/documentation/965_g35_vol_1_graphics_core_0.pdf Intel ® 965 Express Chipset Family and Intel ® G35 Express Chipset Graphics Controller Programmer’s Reference Manual Volume 1: Graphics Core Revision 1.0a Change-Id: I0a5b04c2c5300f5056cb48075aa5804984bc9948 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Signed-off-by: Francis Rowe <info@gluglug.org.uk> Reviewed-on: http://review.coreboot.org/5927 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-08-17gm45: Declare BIOS memory as RAM.Vladimir Serbinenko
So it's in line with other boards and those addresses are cached for faster access. Change-Id: I7794d75ef1e3ceea6b2a4acba01e4af5d1f005f5 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6689 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-17i945: Replace video gfx init.Vladimir Serbinenko
Old init was a replay not even meant to have been committed. This one really computes values and does its job. Tested on Macbook2,1 (1280x800) and X60 (1024x768). Change-Id: I61b6946c095fe06e20ae9a0db54696d0568225dd Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5320 Reviewed-by: Francis Rowe <info@gluglug.org.uk> Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-16AMD Family 14: Fix permissions on one northbridge fileBruce Griffith
fam14_callouts.h should not have the execute bit set. Change-Id: Iab44d04f2c9669e28d2d5028b0a11e565cc7bb07 Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Reviewed-on: http://review.coreboot.org/6675 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-16gm45: Decrease MTRR usageVladimir Serbinenko
Change-Id: I4c790b0eaf2af94286e6691281fcad3d14659a99 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6687 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-16gm45: Make UMA size configurable.Vladimir Serbinenko
Change-Id: I27b2ec70b9c77f3caf9d52788f46f5dc16045d1b Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6686 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-16gm45: Recognize 48MiB gfx UMA.Vladimir Serbinenko
Change-Id: I33e6b357ea044d6ec00b119e84cbada7bf58317f Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6685 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-16intel/gm45: native gfx init.Vladimir Serbinenko
Tested on lenovo X200 in both text and gfx mode. Change-Id: I273971d0f34ca3529959d4228e9516775459b806 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6682 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-14gm45: Set acpi_slp_type only once.Vladimir Serbinenko
It doesn't harm to set several times but it pollutes the log. Change-Id: I7aad7f0229a7d9d071ba844a1cfa123dffc4cacf Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6653 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins)
2014-08-13Falco/Slippy: Patch to refactor haswell/gma.c and ↵Furquan Shaikh
mainboard/google/slippy/i915io.c A large portion of documented registers have been initialized using macros. Only a few undocumented registers are left out. i915io.c looks lot more cleaner by removing redundant calls. However, some more work is required to correctly identify which calls are not required. All the io_writes are replaced by gtt_writes. Change-Id: I077a235652c7d5eb90346cd6e15cc48b5161e969 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/66204 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit 39f3289f68b527575b0a120960ff67f78415815e) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6600 Tested-by: build bot (Jenkins)
2014-08-13gm45: Allow skiping voltage config.Vladimir Serbinenko
Change-Id: I81b9966212d09d4d2561b3adc20d6d8a8a200f4b Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6630 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-12gm45: Move S3 detection to enable stage.Vladimir Serbinenko
Also move it to NB to be in line with other. Change-Id: Ibd961d60dcd686899f34f6a494c14ff9d65e618b Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6625 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-08-12gm45: Reserve RAM for ME if it's active.Vladimir Serbinenko
Change-Id: Icd2b075cec9461f9d6028a8c845f6900b6fe04c8 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6628 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-08-12gm45: Allow coexistance with ME firmware.Vladimir Serbinenko
Change-Id: I08ca5eec94c70b43789122266d68af149772385c Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6626 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-08-12gm45: Ensure that brightness register in gma contains sane value.Vladimir Serbinenko
Change-Id: Ia66c71c3adf2ae0d413750b5e59e3eaba3888a0b Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6587 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-11gm45: Declare brightness variables for ACPI use.Vladimir Serbinenko
Change-Id: I23a088919aaac16066e5dd8300a081a8095a93f0 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6589 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-08-11northbridge/intel/*/gma.c: Remove dead codeEdward O'Callaghan
Remove some dead coded spotted in Clang builds. Change-Id: Ia23e16eae76593eee249e0894ef1d704a274616f Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6130 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-08-11gm45: Set default VGA PCIID.Vladimir Serbinenko
Change-Id: I2eba1ca27c1f8181a9c6288f6794922915575790 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6586 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-08-10Falco/Slippy: Patch to remove redundant graphics initializationsFurquan Shaikh
gma_fui_init repeats the initializations already performed in gma_setup_panel. These redundant initializations reset any gtt settings done before this call. Hence, they had to be done again after call to gma_fui_init. However, the call gma_fui_init is not required at all. Does not affect the behavior of suspend/resume. Old-Change-Id: Idfb9f9930624694b878ddc0fe8648b3c8dd80e55 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/65997 Reviewed-by: Ronald G. Minnich <rminnich@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@google.com> Commit-Queue: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit c376aea1b89c9a829874d5c657693993a3bb1f13) Falco/Slippy: Patch to fix garbage on screen during graphics initialization in normal mode Depending on the init_fb parameter: 1) For normal mode, first page is filled with zeroes and setgtt is used make all GTT entries point to this same page 2) For developer/recovery mode, we init the gtt to consecutive pages Old-Change-Id: I281b0b7efe01f7892e98b19ff9a63c04b087bd2c Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/65633 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit 97c99dfe52ef3a87d387fdbf27ad3a28ad81c722) Squashed two graphics related commits for Falco/Slippy. Change-Id: I7ddb92672c026fe66f9fb0caba9d8fdc3f8a9d0a Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6536 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-08-09ivybridge: Don't propose to include systemagent on native boards.Vladimir Serbinenko
Change-Id: Ib70a6741b55609840b6fd2fca16bcf9883bf143c Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6566 Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Tested-by: build bot (Jenkins)
2014-08-05northbridge/via/vx800: Fix out-of-bounds read due to off-by-oneEdward O'Callaghan
Change-Id: Ia7fda59b60b2148dd4d246686bd94d2334b23eb5 Found-by: Coverity Scan Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6485 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-08-04northbridge/intel: Out of bounds write to array in gma.hEdward O'Callaghan
The signature[] array in the mailbox struct opregion_header_t has IGD_OPREGION_SIGNATURE written to it with a sizeof(IGD_OPREGION_SIGNATURE) and not a sizeof(signature[]). This resulted in a silent off-by-one out of bounds illegal write. Change-Id: I651620a753c743dd2ed2af51c012c27c14a5ea25 Found-by: Coverity Scan Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6473 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-08-03nehalem: Make UMA size configurable in CMOS.Vladimir Serbinenko
All modes tested on X201. Change-Id: I23df81523196ea3f5fdb10eb04f4496c00aaeb9f Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6481 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-08-03sandy/ivybridge: Make UMA size configurable.Vladimir Serbinenko
Change-Id: I9aa3652d1b92cece01d024e19bdc065797896001 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6470 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-31northbridge/amd/agesa/agesawrapper_call.h: Decode status codesEdward O'Callaghan
Decode obscure AGESA status codes into their respective string forms. Change-Id: Iccf175ef62e5005af6ebbfb1bd0acec8aedc2eaa Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6402 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
2014-07-30northbridge/intel: Add fsp_rangeley northbridge supportMartin Roth
This adds the northbridge initialization pieces for Intel's Atom C2000 processor (Formerly Rangeley). It is intended to be used with the Intel Atom C2000 FSP and does not contain all of the pieces that would otherwise be required for initialization. Not currently supported: S3 suspend/resume CAR memory Migration (No early cbmem console) SMM Change-Id: I7665212c892d9a08ecf35d7be70d0afe5fd2c77b Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: http://review.coreboot.org/6369 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-29gm45: Move spd address map to board-specific config.Vladimir Serbinenko
Change-Id: I8f45a821ecd414dbd0129ae6d583d4e7dc06bc5a Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5931 Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Tested-by: build bot (Jenkins)
2014-07-29northbridge/intel/sandybridge/raminit_native: Remove stale FIXME.Vladimir Serbinenko
S3 works just fine. Change-Id: Icd7ae5ad8941bf749a4450efc61e7cede52bf5ef Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6407 Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2014-07-29Uniformly spell frequency unit symbol as HzElyes HAOUAS
Change-Id: I1eb8d5bd79322ff3654a6ad66278a57d46a818c1 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6384 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-29northbridge/intel/nehalem/northbridge.c: Remove unused variableEdward O'Callaghan
Spotted by Clang. Change-Id: I17e64ee989b611fac91072b9e97eab168cfae525 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6128 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-07-29x230: Deploy VBTVladimir Serbinenko
Change-Id: Ide31a56bfdbc31cd3b87993dfb4ed8ef0107cdba Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5396 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-07-29nehalem: Remove fake_vbt copying.Vladimir Serbinenko
Instead generate simple VBT in code. Tested on X201. Change-Id: I2244053edd24c22694161d9bf5f7f2f3eb4e2f57 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5895 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-07-29ivybridge: LVDS gfx init.Vladimir Serbinenko
Change-Id: If71e9c94922cd4283d5e175dfd8757d398a72be1 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5285 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-29sandy/ivybridge: Native raminit (lint clean)Edward O'Callaghan
Remove some trailing whitespaces and add header guards for code introduced in: 7686a56 sandy/ivybridge: Native raminit Change-Id: Ifc9a785ea3a43cfe1f406b57eeba9b5f94f36711 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6393 Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com> Tested-by: build bot (Jenkins)
2014-07-29sandy/ivybridge: Native raminit.Vladimir Serbinenko
Based on damo22's work and my X230 tracing. Works for my X230 in a variety of RAM configs. Also-By: Damien Zammit <damien@zamaudio.com> Change-Id: I1aa024c55a8416fc53b25e7123037df0e55a2769 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: http://review.coreboot.org/5786 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-28AGESA: Drop some excessive agesawrapper.h includesKyösti Mälkki
Change-Id: I3807912b1dc68fae8248a66e37bbe642fb92d3ae Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6262 Tested-by: build bot (Jenkins)
2014-07-24intel/i945/raminit.c: Remove trailing whitespace from `printk()`Paul Menzel
Remove a trailing whitespace after the ellipse in the debug messages in `sdram_program_row_boundaries()`. Setting RAM size... C0DRB = 0x20202010 C1DRB = 0x60606040 TOLUD = 0x00c0 Change-Id: I3ee2886da6b048f509b50864bfcc21fbcb093e74 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/6300 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24northbridge/amd: Remove trailing whitespaceElyes HAOUAS
Change-Id: Iccad59ebac1c47ee3fd16c0c1244b62184cfd1bf Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6316 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24northbridge/intelsch/raminit.h: Remove a trailing whitespaceElyes HAOUAS
Change-Id: Ic8d6007898a08ade9d6e5947cd368b7a0545928a Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6314 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24northbridge/via: Remove a trailing whitespaceElyes HAOUAS
Change-Id: I959f2d42bb3b6cd37a7876ad4dae712bdb5a69da Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6315 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-23src/.../Kconfig: various small fixes to textsDaniele Forsi
Fixed spelling and added empty lines to separate the help from the text automatically added during make menuconfig. Change-Id: I6eee2c86e30573deb8cf0d42fda8b8329e1156c7 Signed-off-by: Daniele Forsi <dforsi@gmail.com> Reviewed-on: http://review.coreboot.org/6313 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-19nehalem: Move cbmem_recovery call to raminit.Vladimir Serbinenko
Currently cbmem_recovery is done in raminit only on non-S3-resume path do it on both paths to reduce confusion. Change-Id: I16161ad449b9802a855fcf834aa721f4f65c0bb4 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5954 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins)
2014-07-17northbridge,Makefile.inc: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
Change-Id: Id1fcd3d1cd8a156a76e1a9a3ca4c7b4004c2c015 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6289 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17northbridge,ASL: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
Change-Id: I8d4bf17fe9fd82499b1515a8e85dff9cba498350 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6294 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com>