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path: root/src/northbridge
AgeCommit message (Expand)Author
2020-01-26intel/i440bx: Add timestamp to RAM initKeith Hui
2020-01-26intel/i440bx: Use smbus_read_byte() for raminit debugKeith Hui
2020-01-16nb/intel/sandybridge: sort LANEBASE_* defines by their addressFelix Held
2020-01-16nb/intel/sandybridge: add macros for byte lane register offsetsFelix Held
2020-01-16nb/intel/sandybridge: refactor code around lane_base[]Felix Held
2020-01-15nb/intel/sandybridge: refactor lane_registers[]Felix Held
2020-01-15nb/intel/sandybridge: drop LyCx(r, x, y) macroFelix Held
2020-01-15nb/intel/sandybridge: Repurpose HOST_BRIDGE macroAngel Pons
2020-01-14intel/nehalem,ibexpeak: Move enable_smbus() callKyösti Mälkki
2020-01-14intel/sandybridge,bd82x6x: Move enable_smbus() callKyösti Mälkki
2020-01-14intel/{gm45,x4x},i82801{ix|jx}: Move enable_smbus() callKyösti Mälkki
2020-01-14intel/{i945,pineview},i82801gx: Move enable_smbus() callKyösti Mälkki
2020-01-14nb/intel/sandybridge: Drop 'or zero' instancesAngel Pons
2020-01-12intel/e7505: Always enable DIMM compatibility checksKyösti Mälkki
2020-01-12intel/e7505: Remove commented out suspicious codeKyösti Mälkki
2020-01-12intel/e7505,i82801dx: Refactor raminitKyösti Mälkki
2020-01-12aopen/dxplplusu,intel/e7505: Move mainboard_romstage_entry()Kyösti Mälkki
2020-01-12intel/e7505,i82801dx: Remove wrapper spd_read_byte()Kyösti Mälkki
2020-01-12asus/{p2b-x,p3b-f},intel/i440bx: Move mainboard_romstage_entry()Kyösti Mälkki
2020-01-12intel/i440bx,i82371: Remove wrapper spd_read_byte()Kyösti Mälkki
2020-01-12asus/p3b-f,intel/i440bx: Move enable/disable_spd() callKyösti Mälkki
2020-01-11nb/intel/sandybridge: Tidy up raminit codeAngel Pons
2020-01-10nb/intel/{i945,sandybridge}/bootblock.c: Fix typoElyes HAOUAS
2020-01-10nb/intel/sandybridge: Add a bunch of MCHBAR definesAngel Pons
2020-01-09device,sb/intel: Move SMBus host controller prototypesKyösti Mälkki
2020-01-09nb/intel/{i945,x4x,pineview}: Remove wrapper spd_read_byte()Kyösti Mälkki
2020-01-09nb/amd/pi/00730F01/state_machine: Add lost optionsMichał Żygowski
2020-01-09amd/agesa/state_machine: Add BeforeInitLate hooksMichał Żygowski
2020-01-09drivers/pc80/rtc: Separate {get|set}_option() prototypesKyösti Mälkki
2020-01-09nb/intel/sandybridge: Make MCHBAR arithmetics consistentAngel Pons
2020-01-08nb/amd/pi: Fix typosElyes HAOUAS
2020-01-07nb/agesa/family14: Don't use _HID and _ADRElyes HAOUAS
2020-01-06drivers/pc80/rtc: Swap cmos_write32() parameter orderKyösti Mälkki
2020-01-02amd/acpi: Drop empty PCSD device nodesNico Huber
2020-01-02src: Remove unneeded 'include <arch/io.h>'Elyes HAOUAS
2020-01-01nb/intel/sandybridge: replace .val_4028 with .io_latencyFelix Held
2020-01-01nb/intel/sandybridge/sandybridge.h: Do cosmetic fixesAngel Pons
2020-01-01nb/intel/sandybridge: Use the MC_BIOS_DATA defineAngel Pons
2020-01-01nb/intel/sandybridge: Make `PM_PDWN_Config` uppercaseAngel Pons
2020-01-01nb/intel/sandybridge: add and use memory thermal configuration registersFelix Held
2020-01-01nb/intel/sandybridge: add and use ME stolen memory and lock bit definesFelix Held
2020-01-01nb/intel/sandybridge: remove unused duplicate PCIEXBAR define X60BARFelix Held
2020-01-01nb/intel/sandybridge: add and use more MCHBAR register definesFelix Held
2020-01-01nb/intel/sandybridge: move MCHBAR register definitions to sandybridge.hFelix Held
2020-01-01nb/intel/sandybridge: use MESEG register names from datasheetFelix Held
2019-12-31nb/amd: Fix typoElyes HAOUAS
2019-12-31src: Remove some romcc workaroundsJacob Garber
2019-12-31northbridge: Add missing include <device/pci_def.h>Elyes HAOUAS
2019-12-29nb/intel/sandybridge: simplify ME lock and memory enable bit writeFelix Held
2019-12-29nb/intel/sandybridge: add and use defines for ME base and mask registersFelix Held