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path: root/src/northbridge
AgeCommit message (Expand)Author
2020-07-06nb/intel/i440bx: Add PMCR register to ACPI codeKeith Hui
2020-07-06nb/intel/i440bx: Refactor ACPI codeKeith Hui
2020-07-02nb/intel/ironlake: Clean up code style (except raminit)Angel Pons
2020-07-01nb/intel/ironlake/northbridge.c: Drop thunk functionsAngel Pons
2020-07-01nb/intel/ironlake: Drop copy-pasted and unused macroAngel Pons
2020-07-01nb/intel/ironlake: Use `pci_update_config32()`Angel Pons
2020-07-01nb/intel/ironlake: Simplify BAR handlingAngel Pons
2020-07-01nb/intel/ironlake/ironlake.h: Clean upAngel Pons
2020-07-01nb/intel/ironlake: Drop copy-pasted and dead codeAngel Pons
2020-07-01nb/intel/ironlake: Remove unused structsAngel Pons
2020-07-01nb/intel/pineview: Drop undefined function declarationAngel Pons
2020-06-27sb/intel/i82801ix: Use pmutil.h definitionsAngel Pons
2020-06-22nb/intel/sandybridge/gma.c: Remove useless if conditionEvgeny Zinoviev
2020-06-22device/smbus_host: Declare common early SMBus prototypesKyösti Mälkki
2020-06-22nb/intel/haswell: Use 16-bit ops on PCI COMMANDAngel Pons
2020-06-15i945 boards: Factor out MAX_CPUSAngel Pons
2020-06-15x4x boards: Factor out MAX_CPUSAngel Pons
2020-06-12nb/intel/i945/rcven.c: Correct commentAngel Pons
2020-06-12nb/intel/i945: Clean up raminit coding styleAngel Pons
2020-06-10nb/intel/i945: Use PCI bitwise opsAngel Pons
2020-06-10nb/intel/x4x: Drop unused `pci_ops.h` includeAngel Pons
2020-06-10nb/intel/pineview: Use PCI bitwise opsAngel Pons
2020-06-09nb/intel/x4x: Use PCI bitwise opsAngel Pons
2020-06-09nb/intel/haswell: Use PCI bitwise opsAngel Pons
2020-06-09nb/intel/sandybridge: Use MCHBAR bitwise opsAngel Pons
2020-06-09nb/intel/sandybridge: Use PCI bitwise opsAngel Pons
2020-06-09nb/intel/gm45/iommu.c: Fix regression when updating PCI commandAngel Pons
2020-06-06src: Use pci_dev_ops_pci where applicableAngel Pons
2020-06-06src: Remove unused 'include <cpu/x86/mtrr.h>'Elyes HAOUAS
2020-06-06src: Remove unused '#include <cpu/x86/smm.h>'Elyes HAOUAS
2020-06-03northbridge/intel/sandybridge: Mask lower 20 bits of TOLUD and TOLM in hostbr...Furquan Shaikh
2020-06-03northbridge/intel/sandybridge: Update hostbridge.asl to ASL2.0 syntaxFurquan Shaikh
2020-06-03northbridge/intel/haswell: Mask lower 20 bits of TOLUD and TOLM in hostbridge...Furquan Shaikh
2020-06-03northbridge/intel/haswell: Update hostbridge.asl to ASL2.0Furquan Shaikh
2020-06-02src: Remove redundant includesElyes HAOUAS
2020-06-02src: Remove unused 'include <bootmode.h>'Elyes HAOUAS
2020-06-02src: Remove unused '#include <cpu/x86/lapic.h>'Elyes HAOUAS
2020-05-27intel/gma: Only enable bus mastering if we are going to use itNico Huber
2020-05-27intel/gma: Don't bluntly enable I/ONico Huber
2020-05-27drivers/intel/gma: Move IGD OpRegion to CBMEMNico Huber
2020-05-26northbridge/intel/i945: Mark legacy VGA memory as reservedFurquan Shaikh
2020-05-26northbridge/amd: Keep using old resource allocatorFurquan Shaikh
2020-05-26device_util,agesa/family14: Do not consider unassigned resources in find_pci_...Furquan Shaikh
2020-05-26nb/intel: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS
2020-05-21nb/intel/sandybridge: Use the new IOSAV struct APIAngel Pons
2020-05-21nb/intel/sandybridge: Drop unused parametersAngel Pons
2020-05-21nb/intel/sandybridge: Redefine IOSAV_SUBSEQUENCEAngel Pons
2020-05-21nb/intel/sandybridge: Truncate IOSAV subseq gapsAngel Pons
2020-05-21nb/intel/sandybridge: Replace macros with functionsAngel Pons
2020-05-21nb/intel/sandybridge: Refactor IOSAV_RUN_ONCEAngel Pons
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