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path: root/src/northbridge
AgeCommit message (Expand)Author
2020-11-25nb/amd: Deduplicate nb_common.hAngel Pons
2020-11-25device: Drop unused HyperTransport codeAngel Pons
2020-11-23nb/amd/agesa/family15tn: define macros for GNB and IOMMU devicesMike Banon
2020-11-23nb/amd/agesa/family15tn: define macro for internal HDMI audio controllerMike Banon
2020-11-22nb/amd/pi: Remove 00660F01 directory & filesMartin Roth
2020-11-22cpu/amd/pi: Remove unused cpu code 00660F01Martin Roth
2020-11-22nb/intel/sandybridge: Clean up COMPOFST1 logicAngel Pons
2020-11-22nb/intel/sandybridge: Correct get_COMP2 functionAngel Pons
2020-11-22nb/intel/sandybridge: Rename and refactor `discover_timC_write`Angel Pons
2020-11-22nb/intel/sandybridge: Only use write Vref if supportedAngel Pons
2020-11-22nb/intel/sandybridge: Refine power-down mode logicAngel Pons
2020-11-22nb/intel/sandybridge: Lower tPRPDEN to 1Angel Pons
2020-11-22nb/intel/sandybridge: Increase tRWDRDD with fast RAMAngel Pons
2020-11-22nb/intel/sandybridge: Rename and clean up `discover_edges_write`Angel Pons
2020-11-22nb/intel/sandybridge: Relocate PREA-ACT-RD sequenceAngel Pons
2020-11-22nb/intel/sandybridge: Remove spurious writes to IOSAV BW maskAngel Pons
2020-11-22nb/intel/sandybridge: Drop `precharge` functionAngel Pons
2020-11-22nb/intel/sandybridge: Clarify register writeAngel Pons
2020-11-22nb/intel/sandybridge: Encapsulate JEDEC write levelingAngel Pons
2020-11-22nb/intel/sandybridge: Do not rewrite write leveling sequenceAngel Pons
2020-11-22nb/intel/sandybridge: Make helper for write leveling sequenceAngel Pons
2020-11-22nb/intel/sandybridge: Run `read_mpr_training` before write trainingAngel Pons
2020-11-22nb/intel/sandybridge: Rename `read_training` functionAngel Pons
2020-11-22nb/intel/sandybridge: Use bitfield for GDCRTRAININGMOD registerAngel Pons
2020-11-22nb/intel/sandybridge: Use bitfield for GDCRCMDPICODINGAngel Pons
2020-11-22nb/intel/sandybridge: Move constants out of for-loopAngel Pons
2020-11-22nb/intel/sandybridge: Use bitfields to program MCMAIN timingsAngel Pons
2020-11-22nb/intel/sandybridge: Clean up TC_OTHP writesAngel Pons
2020-11-22nb/intel/sandybridge: Use one sequence for write levelingAngel Pons
2020-11-21nb/intel/sandybridge: Introduce `disable_refresh_machine` functionAngel Pons
2020-11-20nb/intel/sandybridge: Rename loop variableAngel Pons
2020-11-20nb/intel/sandybridge: Remove unnecessary per-rank loopsAngel Pons
2020-11-20nb/intel/sandybridge: Rename `discover_edges` functionsAngel Pons
2020-11-20nb/intel/sandybridge: Restore nominal Vref for current channelAngel Pons
2020-11-20nb/intel/sandybridge: Rename `timC_discovery` and relatedAngel Pons
2020-11-20nb/intel/sandybridge: Introduce `ddr3_mirror_mrreg` helperAngel Pons
2020-11-20nb/intel/sandybridge: Replace and-zero with assignmentAngel Pons
2020-11-20nb/intel/sandybridge: Introduce `find_predefined_pattern` functionAngel Pons
2020-11-20nb/intel/sandybridge: Rename receive enable functionsAngel Pons
2020-11-20nb/intel/sandybridge: Rework timA minmax codeAngel Pons
2020-11-19nb/intel/sandybridge: Correct some whitespace issuesAngel Pons
2020-11-19nb/intel/sandybridge: Clean up `dram_mr2` functionAngel Pons
2020-11-19nb/intel/sandybridge: Limit SRT to Ivy Bridge and slow RAMAngel Pons
2020-11-19nb/intel/sandybridge: Program MR2 shadow registerAngel Pons
2020-11-19nb/intel/sandybridge: Drop unused `rank` parameterAngel Pons
2020-11-19nb/intel/sandybridge: Relocate `get_ODT` functionAngel Pons
2020-11-19nb/intel/sandybridge: Clean up MR0 compositionAngel Pons
2020-11-19nb/intel/sandybridge: Rewrite magic numbersAngel Pons
2020-11-19nb/intel/sandybridge: Remove now-unnecessary sequence macrosAngel Pons
2020-11-19nb/intel/sandybridge: Create sequence helpersAngel Pons
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