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coreboot
2560p
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autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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northbridge
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Author
2015-10-29
northbridge/amd/amdk8: Improve DIMM detection debugging
Timothy Pearson
2015-10-27
northbridge/amd/amdfam10: Limit maximum RAM clock to BKDG recommendations
Timothy Pearson
2015-10-26
northbridge/amd/amdmct: Fix broken AMD K10 DDR3 memory initalization
Timothy Pearson
2015-10-25
AMD Family 0Fh: ensure CONFIG_CBB and CONFIG_CDB have sane values
Jonathan A. Kollasch
2015-10-25
northbridge/amd/amdfam10: Enable advanced PCIe setup options
Timothy Pearson
2015-10-24
cpu/amd: Add initial support for AMD Socket G34 processors
Timothy Pearson
2015-10-23
Intel: Move MCRS ResourceTemplate outside of _CRS method
Martin Roth
2015-10-23
northbridge/amd/amdmct: Fix Family 15h detection
Timothy Pearson
2015-10-23
northbridge/amd/amdmct/mct_ddr3: Fix curly brace style violations
Timothy Pearson
2015-10-23
northbridge/amd/amdfam10: Fix typo in comment
Timothy Pearson
2015-10-22
Revert "Remove sandybridge and ivybridge FSP code path"
Martin Roth
2015-10-15
cpu/mtrr.h: Fix macro names for MTRR registers
Alexandru Gagniuc
2015-10-14
Revert "Remove FSP Rangeley SOC and mohonpeak board support"
Martin Roth
2015-10-12
gma: Consolidate Intel IGD ACPI code some more
Nico Huber
2015-10-11
Kill lvds_num_lanes
Vladimir Serbinenko
2015-10-11
Derive lvds_dual_channel from EDID timings.
Vladimir Serbinenko
2015-10-09
nb/intel/sandybridge/raminit: Add edge write discovery check
Patrick Rudolph
2015-10-09
northbridge/intel/sandybridge: Do not disable PEG by default
Patrick Rudolph
2015-10-09
northbridge/intel/sandybridge: Enable PEG clock-gating on demand
Patrick Rudolph
2015-10-07
x86/bootblock: Use LDFLAGS_bootblock to enable garbage collection
Alexandru Gagniuc
2015-10-04
northbridge/intel/nehalem: Fix native VGA init
Nicolas Reinecke
2015-10-03
Remove FSP Rangeley SOC and mohonpeak board support
Alexandru Gagniuc
2015-10-03
Remove sandybridge and ivybridge FSP code path
Alexandru Gagniuc
2015-10-03
sandybridge ivybridge: Treat native init as first class citizen
Alexandru Gagniuc
2015-10-01
northbridge/intel/gm45: Fix native VGA init
Audrey Pearson
2015-09-30
amd/family14: Add k10temp thermal zone.
Tobias Diedrich
2015-09-24
coreboot: move TS_END_ROMSTAGE to one spot
Aaron Durbin
2015-09-14
AGESA S3 support: Fix excessive stack usage
Kyösti Mälkki
2015-09-09
x86: bootblock: remove linking and program flow from build system
Aaron Durbin
2015-09-07
intel/sandybridge: Do not guard native VGA init by #ifdefs
Alexandru Gagniuc
2015-09-07
northbridge/amd/amdfam10: Use adequate size for HT speed limit field
Timothy Pearson
2015-09-07
intel i945: Fix native VGA initialization
Mono
2015-09-07
north/intel/sandybridge: Fix native VGA initialization
Alexandru Gagniuc
2015-09-07
intel: Do not hardcode the position of mrc.cache
Alexandru Gagniuc
2015-09-04
bootstate: remove need for #ifdef ENV_RAMSTAGE
Aaron Durbin
2015-09-04
x86: remove cpu_incs as romstage Make variable
Aaron Durbin
2015-08-31
northbridge/intel/gm45/Kconfig: Remove IOMMU symbol choice
Martin Roth
2015-08-31
AMD Bettong: Lower the TOM to give more MMIO space
zbao
2015-08-30
Kconfig: Remove EXPERT mode
Alexandru Gagniuc
2015-08-28
edid: Use edid_mode struct to reduce redundancy
David Hendricks
2015-08-25
Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in Kconfig
Martin Roth
2015-08-18
northbridge/amd/amdfam10: Redirect legacy VGA memory access to MMIO
Timothy Pearson
2015-08-13
amd: raminit sysinfo offset fix
Aaron Durbin
2015-08-10
intel/i945: don't read structs out of uninitialized pointers
Patrick Georgi
2015-08-09
AMD K8: Avoid duplicate variables in SSDT on multisocket systems
Jonathan A. Kollasch
2015-07-29
intel/haswell: fix CHROMEOS builds for haswell
Patrick Georgi
2015-07-22
intel raminit: rewrite timB high adjust calculation
Patrick Rudolph
2015-07-22
intel raminit: support two DIMMs per channel
Patrick Rudolph
2015-07-21
Port Fam14 northbridge code to 64bit
Stefan Reinauer
2015-07-21
Revert "northbridge/amd/pi: Add support for memory settings"
Marc Jones
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