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path: root/src/northbridge
AgeCommit message (Expand)Author
2013-09-10intel/i945 intel/i82801gx: remove explicit pcie config accessesKyösti Mälkki
2013-09-10intel/gm45: Use MMCONF_SUPPORT_DEFAULTKyösti Mälkki
2013-08-29Sandybridge/Ivybridge: Unify and fix Kconfig defaultsStefan Reinauer
2013-08-24Add pci_devfn_t and use with __SIMPLE_DEVICE__Kyösti Mälkki
2013-08-16Correct spelling of shadow, setting and memoryPaul Menzel
2013-08-15AMD Richland: Add new graphics device IDs to Family 15, Models 10-1FBruce Griffith
2013-08-15AMD Kabini: Split DSDT into common sectionsMike Loptien
2013-08-09intel/sandybridge intel/bd82x6x: remove explicit pcie config accessesKyösti Mälkki
2013-08-08ASUS F2A85-M: Split DSDT into common sections (as per Parmer)Kimarie Hoot
2013-08-05AMD Kabini: Add map_oprom() function for Vendor/Device IDsBruce Griffith
2013-08-05AMD Kabini: Add northbridge AGESA wrapper (new AMD processor)Siyuan Wang
2013-08-01Add directive __SIMPLE_DEVICE__Kyösti Mälkki
2013-07-31Drop unused EXTERNAL_MRC_BLOBStefan Reinauer
2013-07-16AMD Fam15tn: Split DSDT into common sectionsSteve Goodrich
2013-07-11Set PCI bus operations at buildtime for ramstageKyösti Mälkki
2013-07-10usbdebug: Move ehci_debug_info allocationKyösti Mälkki
2013-07-10Rename hardwaremain() to main()Stefan Reinauer
2013-07-10FUI: reorganize include filesRonald G. Minnich
2013-07-10Drop some duplicates of PCI-e config functionsKyösti Mälkki
2013-07-10Fix MMCONF_SUPPORT_DEFAULT for ramstageKyösti Mälkki
2013-07-09fox_wtm2: First step support for coreboot-based graphics startupRonald G. Minnich
2013-07-09FOX_WTM2: First pass at FUI.Ronald G. Minnich
2013-07-04intel/i5000: Use MMCONF_SUPPORT_DEFAULTKyösti Mälkki
2013-07-04Move select MMCONF_SUPPORT under northbridge (fix)Kyösti Mälkki
2013-07-04intel/i945: Use MMCONF_SUPPORT_DEFAULTKyösti Mälkki
2013-07-04intel/sandybridge intel/ivybridge: Use MMCONF_SUPPORT_DEFAULTKyösti Mälkki
2013-07-03Move select MMCONF_SUPPORT under northbridgeKyösti Mälkki
2013-07-02Intel GM45, 945, Sandy Bridge: Unify `delay.c` and `udelay.c`Paul Menzel
2013-07-02Make setting MAX_PIRQ_LINKs depend on NORTHBRIDGE_VIA_VX900Dave Frodin
2013-06-28amd/cimx/rd890/amd.h: Eliminate redefinition of NULLBruce Griffith
2013-06-28amd/agesa/family15/northbridge.c: Delete unused variableBruce Griffith
2013-06-28Add support to enable/disable builtin GbE (again)Stefan Reinauer
2013-06-27Revert "Add support to enable/disable builtin GbE"Kyösti Mälkki
2013-06-25Vortex86EX northbridge.c : Remove Vortex86DX PCI N/B related code.Andrew Wu
2013-06-25intel/sch: Use MMCONF_BASE_ADDRESSKyösti Mälkki
2013-06-24AMD: Drop empty root_complexKyösti Mälkki
2013-06-24AMD Fam15tn: Add support for AGESA runtime allocation in CBMEMRudolf Marek
2013-06-24AMD Fam15tn: Add IOMMU BAR allocation to northbridgeRudolf Marek
2013-06-22intel/sandybridge: Locate CBMEM TOC early in ramstageKyösti Mälkki
2013-06-22Add support for DMP Vortex86EX PCI northbridge.Andrew Wu
2013-06-21Add support to enable/disable builtin GbEStefan Reinauer
2013-06-20sandybridge: Store MRC cache in CBFSPatrick Georgi
2013-06-13AMD: Kconfig cleanupKyösti Mälkki
2013-06-10VX900: Use MIN/MAX from stdlib.h instead of redefining themAlexandru Gagniuc
2013-06-10VIA VX900: Add minimal ramstage needed to boot linuxAlexandru Gagniuc
2013-06-10VX900: Add DDR3 initializationAlexandru Gagniuc
2013-06-10VX900: Add support for early romstageAlexandru Gagniuc
2013-06-07i945: Add Display defines for int15h handler.Denis 'GNUtoo' Carikli
2013-06-05Intel 945: Select LAPIC_MONOTONIC_TIMER for X86EMU_DEBUG_TIMINGSDenis 'GNUtoo' Carikli
2013-06-04Move the MARK_GRAPHICS_MEM_WRCOMB to x86 architectureRonald G. Minnich
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