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AgeCommit message (Expand)Author
2010-10-11Factor out a few commonly duplicated functions from northbridge.c.Uwe Hermann
2010-10-09Remove various .c #includes from Intel 440BX/82371EB boards.Uwe Hermann
2010-10-09Trivial. Spell checking.Zheng Bao
2010-10-09Trivial. Spell checking.Zheng Bao
2010-10-08Trivial. Spell checking.Zheng Bao
2010-10-08Trivial. Fix the typo.Zheng Bao
2010-10-07Remove duplicate line from pci_ids.h.Jonathan Kollasch
2010-10-06Convert all Intel 440BX boards to Cache-as-RAM (CAR).Uwe Hermann
2010-10-05Use %p instead of %x to print void *.Jonathan Kollasch
2010-10-05Remove lib/ramtest.c-include from all CAR boards.Patrick Georgi
2010-10-02Fix spelling/typos in comments.Jonathan Kollasch
2010-10-01Move CACHE_AS_RAM_ADDRESS_DEBUG out of romstage.c into Kconfig,Patrick Georgi
2010-10-01Make i945/raminit.c:fsbclk() return u16 rather than intPeter Stuge
2010-10-01Split NORTHBRIDGE_INTEL_I945 into more precise _I945GC and _I945GMPeter Stuge
2010-10-01Move several i945 config #defines from romstage.c to Kconfig.Patrick Georgi
2010-10-01Trivial. Re-indent the code.Zheng Bao
2010-09-30Rename build system variables to be more intuitive, andPatrick Georgi
2010-09-28Trivial. re-Indent the code.Zheng Bao
2010-09-27Obviously missing brackets.Xavi Drudis Ferran
2010-09-25Mark read-only data as read-only, so the global vars test doesn't fail on it.Patrick Georgi
2010-09-25Various CONFIG_DEBUG_RAM_SETUP related fixes (trivial).Uwe Hermann
2010-09-25Keep the mc146818rtc.h include close to the option table include whereMyles Watson
2010-09-25- Fix race condition in option_table.h generation by moving the includeStefan Reinauer
2010-09-21Complete the code which was missing.Zheng Bao
2010-09-21Fix the typo. Field DisAutoRefresh is in DramTimngHi.Zheng Bao
2010-09-20A number of cleanups for 440BX raminit code.Keith Hui
2010-09-13Add reserved areas for fam10.Myles Watson
2010-09-13Port k8 UMA handling to fam10.Myles Watson
2010-09-13Fix a typo reported by Sylvain Hitier.Myles Watson
2010-09-13Convert i945 boards to use reserved resources instead of directly addingMyles Watson
2010-09-10Move memory type information out of some AMD sockets.Myles Watson
2010-09-09Please find appended. This patch gets rid of the %gs magic altogether,Arne Georg Gleditsch
2010-09-09Also improve boot time on AMD for the DDR3 code path.Arne Georg Gleditsch
2010-09-09Apparently, it's not crucial to clear this at the exact moment we switchArne Georg Gleditsch
2010-09-05Trivial. Currently the max frequency is preset as 400Mhz. We need to set aZheng Bao
2010-09-04AMD DDR2 and DDR3 MCT function InitPhyCompensation() compliant with AGESA code.Kerry She
2010-09-02Trivial warning fix for adl855pc.Myles Watson
2010-08-31Get Byte65/66 for register manufacture ID code. RegMan1Present willZheng Bao
2010-08-30We call this cache as ram everywhere, so let's call it the same in KconfigStefan Reinauer
2010-08-30This file was missing from r5751.Andreas Schultz
2010-08-30Rework i855GM/i855GME supportAndreas Schultz
2010-08-30Multi-DIMMS on AMD ddr2 MCT channel B fixed.Kerry She
2010-08-30Multi-DIMMS on AMD ddr3 MCT channel B works.Kerry She
2010-08-30Trivial syntax correction of AMD mct_ddr3 dir.Kerry She
2010-08-27drop three unneeded config variables:Jens Rottmann
2010-08-26CONFIG_DEBUG_RAM_SETUP and CONFIG_DEBUG_SMBUS are only available if the board /Jens Rottmann
2010-08-26One of my boards needs this mini delay in order to survive ram initialization.Stefan Reinauer
2010-08-25Fix i945 based boardsStefan Reinauer
2010-08-24* Adds support for PC Engines Alix.2D(1)3 board to Coreboot.Aurelien Guillaume
2010-08-22documented workaround erratum 414, seeXavi Drudis Ferran
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