Age | Commit message (Expand) | Author |
2020-01-26 | intel/i440bx: Resolve long standing raminit TODOs | Keith Hui |
2020-01-26 | intel/i440bx: Add timestamp to RAM init | Keith Hui |
2020-01-26 | intel/i440bx: Use smbus_read_byte() for raminit debug | Keith Hui |
2020-01-16 | nb/intel/sandybridge: sort LANEBASE_* defines by their address | Felix Held |
2020-01-16 | nb/intel/sandybridge: add macros for byte lane register offsets | Felix Held |
2020-01-16 | nb/intel/sandybridge: refactor code around lane_base[] | Felix Held |
2020-01-15 | nb/intel/sandybridge: refactor lane_registers[] | Felix Held |
2020-01-15 | nb/intel/sandybridge: drop LyCx(r, x, y) macro | Felix Held |
2020-01-15 | nb/intel/sandybridge: Repurpose HOST_BRIDGE macro | Angel Pons |
2020-01-14 | intel/nehalem,ibexpeak: Move enable_smbus() call | Kyösti Mälkki |
2020-01-14 | intel/sandybridge,bd82x6x: Move enable_smbus() call | Kyösti Mälkki |
2020-01-14 | intel/{gm45,x4x},i82801{ix|jx}: Move enable_smbus() call | Kyösti Mälkki |
2020-01-14 | intel/{i945,pineview},i82801gx: Move enable_smbus() call | Kyösti Mälkki |
2020-01-14 | nb/intel/sandybridge: Drop 'or zero' instances | Angel Pons |
2020-01-12 | intel/e7505: Always enable DIMM compatibility checks | Kyösti Mälkki |
2020-01-12 | intel/e7505: Remove commented out suspicious code | Kyösti Mälkki |
2020-01-12 | intel/e7505,i82801dx: Refactor raminit | Kyösti Mälkki |
2020-01-12 | aopen/dxplplusu,intel/e7505: Move mainboard_romstage_entry() | Kyösti Mälkki |
2020-01-12 | intel/e7505,i82801dx: Remove wrapper spd_read_byte() | Kyösti Mälkki |
2020-01-12 | asus/{p2b-x,p3b-f},intel/i440bx: Move mainboard_romstage_entry() | Kyösti Mälkki |
2020-01-12 | intel/i440bx,i82371: Remove wrapper spd_read_byte() | Kyösti Mälkki |
2020-01-12 | asus/p3b-f,intel/i440bx: Move enable/disable_spd() call | Kyösti Mälkki |
2020-01-11 | nb/intel/sandybridge: Tidy up raminit code | Angel Pons |
2020-01-10 | nb/intel/{i945,sandybridge}/bootblock.c: Fix typo | Elyes HAOUAS |
2020-01-10 | nb/intel/sandybridge: Add a bunch of MCHBAR defines | Angel Pons |
2020-01-09 | device,sb/intel: Move SMBus host controller prototypes | Kyösti Mälkki |
2020-01-09 | nb/intel/{i945,x4x,pineview}: Remove wrapper spd_read_byte() | Kyösti Mälkki |
2020-01-09 | nb/amd/pi/00730F01/state_machine: Add lost options | Michał Żygowski |
2020-01-09 | amd/agesa/state_machine: Add BeforeInitLate hooks | Michał Żygowski |
2020-01-09 | drivers/pc80/rtc: Separate {get|set}_option() prototypes | Kyösti Mälkki |
2020-01-09 | nb/intel/sandybridge: Make MCHBAR arithmetics consistent | Angel Pons |
2020-01-08 | nb/amd/pi: Fix typos | Elyes HAOUAS |
2020-01-07 | nb/agesa/family14: Don't use _HID and _ADR | Elyes HAOUAS |
2020-01-06 | drivers/pc80/rtc: Swap cmos_write32() parameter order | Kyösti Mälkki |
2020-01-02 | amd/acpi: Drop empty PCSD device nodes | Nico Huber |
2020-01-02 | src: Remove unneeded 'include <arch/io.h>' | Elyes HAOUAS |
2020-01-01 | nb/intel/sandybridge: replace .val_4028 with .io_latency | Felix Held |
2020-01-01 | nb/intel/sandybridge/sandybridge.h: Do cosmetic fixes | Angel Pons |
2020-01-01 | nb/intel/sandybridge: Use the MC_BIOS_DATA define | Angel Pons |
2020-01-01 | nb/intel/sandybridge: Make `PM_PDWN_Config` uppercase | Angel Pons |
2020-01-01 | nb/intel/sandybridge: add and use memory thermal configuration registers | Felix Held |
2020-01-01 | nb/intel/sandybridge: add and use ME stolen memory and lock bit defines | Felix Held |
2020-01-01 | nb/intel/sandybridge: remove unused duplicate PCIEXBAR define X60BAR | Felix Held |
2020-01-01 | nb/intel/sandybridge: add and use more MCHBAR register defines | Felix Held |
2020-01-01 | nb/intel/sandybridge: move MCHBAR register definitions to sandybridge.h | Felix Held |
2020-01-01 | nb/intel/sandybridge: use MESEG register names from datasheet | Felix Held |
2019-12-31 | nb/amd: Fix typo | Elyes HAOUAS |
2019-12-31 | src: Remove some romcc workarounds | Jacob Garber |
2019-12-31 | northbridge: Add missing include <device/pci_def.h> | Elyes HAOUAS |
2019-12-29 | nb/intel/sandybridge: simplify ME lock and memory enable bit write | Felix Held |