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Some coreboot project code with my work
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northbridge
Age
Commit message (
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Author
2012-07-24
CPU: Add basic support for Nominal Configurable TDP
Duncan Laurie
2012-07-24
Rename cache_lbmem() to cache_ramstage()
Stefan Reinauer
2012-07-24
Make ACPI code detect Sandy/Ivy Bridge dynamically
Stefan Reinauer
2012-07-24
Drop (empty) sandybridge_late_initialization()
Stefan Reinauer
2012-07-24
Add support for HM70 and NM70 LPC bridge
Stefan Reinauer
2012-07-24
Print PCI ID of PCH during boot up
Stefan Reinauer
2012-07-24
Drop leading spaces from CPU name string
Stefan Reinauer
2012-07-24
Fix MRC cache update delays
Stefan Reinauer
2012-07-24
SandyBridge: Add another PCI device ID for northbridge
Walter Murphy
2012-07-24
Fixes to enable RC6 on IvyBridge
Duncan Laurie
2012-07-22
i945: Disable IGD if plugin VGA is preferred
Patrick Georgi
2012-07-22
Trinity wrapper code improvement.
zbao
2012-07-20
Fix udelay() implementation for i945 romstage
Nico Huber
2012-07-20
Drop VGA_BRIDGE_SETUP config option
Patrick Georgi
2012-07-20
Intel SCH northbridge: fix resource index
Kyösti Mälkki
2012-07-16
Drop invalid device ops on Agesa northbridge
Kyösti Mälkki
2012-07-16
AMD: Fix GFXUMA with 4GB or more RAM
Kyösti Mälkki
2012-07-16
Move setup_uma_memory() to K8 northbridge
Kyösti Mälkki
2012-07-16
Move setup_uma_memory() to AMDFAM10 northbridge
Kyösti Mälkki
2012-07-16
Move setup_uma_memory() to Agesa Family14 northbridge
Kyösti Mälkki
2012-07-16
Move setup_uma_memory() to Agesa Family12 northbridge
Kyösti Mälkki
2012-07-16
Move setup_uma_memory() to Agesa Family15 northbridge
Kyösti Mälkki
2012-07-16
Define global uma_memory variables
Kyösti Mälkki
2012-07-16
Add global uma_resource()
Kyösti Mälkki
2012-07-16
i5000: Fix resource allocation
Sven Schnelle
2012-07-09
i5000: reset system if raminit fails
Sven Schnelle
2012-07-06
i5000: Add PCI ids for all i5000 flavours
Sven Schnelle
2012-07-06
i945: Reset IGD on boot
Patrick Georgi
2012-07-03
AGESA F15 wrapper for Trinity
zbao
2012-06-21
Don't use 64-bit constant 0x100000000 in linker scripts
Nico Huber
2012-06-20
i5000: fix another typo
Sven Schnelle
2012-06-20
i5000: fix typos
Sven Schnelle
2012-06-18
i5000: enforce hard reset
Sven Schnelle
2012-05-29
Sandybridge: Remove remnants of FDT support from MRC cache code
Stefan Reinauer
2012-05-29
Sandybridge: Fix MRC cache calculation
Stefan Reinauer
2012-05-24
cbtypes.h: Unify cbtypes.h used in AMD board's code
Vikram Narayanan
2012-05-11
Hook up MRC cache update
Stefan Reinauer
2012-05-11
Rework Sandybridge MRC cache handling
Stefan Reinauer
2012-05-08
Some more #if cleanup
Patrick Georgi
2012-05-08
Clean up #ifs
Patrick Georgi
2012-05-03
Add missing newline to printk in Sandybridge init code
Stefan Reinauer
2012-05-02
Make Intel i5000 specific options only appear on i5000 systems
Stefan Reinauer
2012-05-02
Strip quotes from Sandybridge MRC blob
Stefan Reinauer
2012-05-02
Sandybridge: Display platform information early
Vadim Bendebury
2012-05-01
Update Ivybridge GT power meter tables
Duncan Laurie
2012-05-01
Update ivybridge graphics initialization
Duncan Laurie
2012-05-01
Only send ME Dram Init Done message on Sandybridge
Duncan Laurie
2012-05-01
Modify DMI init for IvyBridge
Vincent Palatin
2012-05-01
Fix Sandybridge/Ivybridge mainboards according to code review
Stefan Reinauer
2012-04-30
Sandybridge: Temporarily disable MRC cache finding code
Stefan Reinauer
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