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path: root/src/northbridge
AgeCommit message (Expand)Author
2012-05-29Sandybridge: Remove remnants of FDT support from MRC cache codeStefan Reinauer
2012-05-29Sandybridge: Fix MRC cache calculationStefan Reinauer
2012-05-24cbtypes.h: Unify cbtypes.h used in AMD board's codeVikram Narayanan
2012-05-11Hook up MRC cache updateStefan Reinauer
2012-05-11Rework Sandybridge MRC cache handlingStefan Reinauer
2012-05-08Some more #if cleanupPatrick Georgi
2012-05-08Clean up #ifsPatrick Georgi
2012-05-03Add missing newline to printk in Sandybridge init codeStefan Reinauer
2012-05-02Make Intel i5000 specific options only appear on i5000 systemsStefan Reinauer
2012-05-02Strip quotes from Sandybridge MRC blobStefan Reinauer
2012-05-02Sandybridge: Display platform information earlyVadim Bendebury
2012-05-01Update Ivybridge GT power meter tablesDuncan Laurie
2012-05-01Update ivybridge graphics initializationDuncan Laurie
2012-05-01Only send ME Dram Init Done message on SandybridgeDuncan Laurie
2012-05-01Modify DMI init for IvyBridgeVincent Palatin
2012-05-01Fix Sandybridge/Ivybridge mainboards according to code reviewStefan Reinauer
2012-04-30Sandybridge: Temporarily disable MRC cache finding codeStefan Reinauer
2012-04-30Add default map_oprom_vendev() for AMD Family 14h processors.Martin Roth
2012-04-28Reverse Vendor ID & Device ID for map_oprom_vendev()Martin Roth
2012-04-27SMM: Add udelay on Sandybridge systemsStefan Reinauer
2012-04-21Intel e7505: build as separate object fileKyösti Mälkki
2012-04-21Intel e7505: enable ECC scrubbingKyösti Mälkki
2012-04-20Refactor some alignment handlingPatrick Georgi
2012-04-19Intel e7505: refactor onlyKyösti Mälkki
2012-04-17Intel e7505: handlers for undocumented registersKyösti Mälkki
2012-04-16S3 code in coreboot public folder.zbao
2012-04-12Unify IO APIC address specificationPatrick Georgi
2012-04-11Intel e7505: cleanupsKyösti Mälkki
2012-04-11Intel e7505: renames onlyKyösti Mälkki
2012-04-05amdfam10: add phenom II as known cpuBernhard Urban
2012-04-05Add support for Intel Sandybridge CPU (northbridge part)Stefan Reinauer
2012-03-27Add the support for RDC R8610 NorthbridgeRudolf Marek
2012-03-16Fix AMD Fam15 CBMEM allocationStefan Reinauer
2012-03-16Fix AMD Fam12 CBMEM allocationStefan Reinauer
2012-03-16Fix AMD Fam10 CBMEM allocationStefan Reinauer
2012-03-16AMD Agesa: delete no-op bootblock filesKyösti Mälkki
2012-03-16Rename AMD_AGESA to CPU_AMD_AGESAKyösti Mälkki
2012-03-16Fix AMD Agesa leaking KconfigKyösti Mälkki
2012-03-16Intel northbridge I945: Apply un-written naming rulesKyösti Mälkki
2012-03-16VIA southbridge K8T890: Apply un-written naming rulesKyösti Mälkki
2012-03-16Fix AMD Fam14 cbmen allocationMarc Jones
2012-03-15Clean up whitespace in fam14 northbridge.cMarc Jones
2012-03-07Move C labels to start-of-linePatrick Georgi
2012-03-02Fix ECC disable option for AMD Fam10 DDR2 and DDR3.Marc Jones
2012-02-17Avoid ../../.. paths in ASL filesPatrick Georgi
2012-02-17Rename i945 ACPI files to not carry an i945_ prefixPatrick Georgi
2012-02-17Remove whitespace.Patrick Georgi
2012-02-16AGESA F15: AGESA family15 model 00-0fh northbridge wrapperKerry Sheh
2012-02-16RD890: AMD RD890/SR56X0 CIMX wrapperKerry Sheh
2012-02-10Remove non-existent includeSven Schnelle