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path: root/src/northbridge
AgeCommit message (Expand)Author
2006-05-02Fall back to pre-broken settings and setup for GX2. Ronald G. Minnich
2006-04-27remove more codeLi-Ta Lo
2006-04-27code cleanup, comments addedLi-Ta Lo
2006-04-27more code removal and removal of incorrect register settings.Ronald G. Minnich
2006-04-27removing redundant and unneeded calls to functions.Ronald G. Minnich
2006-04-27we don't need msr_initRonald G. Minnich
2006-04-26some todo and comment for ron.Li-Ta Lo
2006-04-21Lower debug progress messages in vt8623 init to debug level rather than error.Jonathan McDowell
2006-04-20boot to kernelLi-Ta Lo
2006-04-19resolve conflictLi-Ta Lo
2006-04-18fix adjustment for sizeramRonald G. Minnich
2006-04-18add ram resourcesRonald G. Minnich
2006-04-13minor modificationLi-Ta Lo
2006-04-11small fixes to get Ward Vandewege's Tyan board booting.Stefan Reinauer
2006-04-10added chipsetinit function, many defines. addec call to chipsetinit to Ronald G. Minnich
2006-04-07add support for GLIUInit()Ronald G. Minnich
2006-04-06add northbridgeinit, also add new constants.Ronald G. Minnich
2006-04-06more fix for vsm, not working yetLi-Ta Lo
2006-04-03did I commit the last change?Li-Ta Lo
2006-04-03new cache_as_ram support Yinghai Lu
2006-03-26trying to translate some of this.Stefan Reinauer
2006-03-22fix bit-twiddling errors on msrRonald G. Minnich
2006-03-21vsm can be called now, and then hang.Ronald G. Minnich
2006-03-21cpubug is fine. Ronald G. Minnich
2006-03-20added definitions. added cpubug support. added object. Commented out Ronald G. Minnich
2006-03-17added initial msr supportRonald G. Minnich
2006-03-17resolving conflict with Ron's workLi-Ta Lo
2006-03-16add in the msr configurationRonald G. Minnich
2006-03-15stupid svn failed.Ronald G. Minnich
2006-03-14for different pll values.Ronald G. Minnich
2006-03-14Make the pll stuff parameterized.Ronald G. Minnich
2006-03-14Fix for nehemiahRonald G. Minnich
2006-03-13added pll_reset.cLi-Ta Lo
2006-03-13added early_setup.cLi-Ta Lo
2006-03-13failed attempt to do early init for cs5535. Almost there butLi-Ta Lo
2006-03-02I am so stupid to mix up logical and bitwise NOT.Li-Ta Lo
2006-02-28remove more unused codeLi-Ta Lo
2006-02-28semi working with random 1 bit errorLi-Ta Lo
2006-02-23preliminary GX DRAM initization. It is not working yet.Li-Ta Lo
2006-01-27adding preliminary, and almost certainly wrong, rumba support. Ronald G. Minnich
2006-01-04typoYinghai Lu
2006-01-04type error fixed...Yinghai Lu
2005-12-14from issue 53: don't set TOM2 if 4G less mem installed, opt for init_eccYinghai Lu
2005-12-08fix bus problem with s2885 with issue 47Yinghai Lu
2005-12-06from issue 47, put chain on bus 0, 0x40, 0x80, 0xc0Yinghai Lu
2005-12-06use hcdn to simplify the mptable.c and irqtable.c --- patch fro issueYinghai Lu
2005-12-041203_hcdn.diff: Stefan Reinauer
2005-12-021201_ht_bus0_dev0_fidvid_core.diffStefan Reinauer
2005-12-01Applying YhLu's patch from issue 37.Stefan Reinauer
2005-11-26- Apply 11_24_a_s1_core.diff fromStefan Reinauer