summaryrefslogtreecommitdiff
path: root/src/northbridge
AgeCommit message (Expand)Author
2017-02-22intel/i945: Fix up whitespace and indentationPaul Menzel
2017-02-22nehalem/Kconfig: Rename TRAINING_CACHE_SIZE to MRC_CACHE_SIZEArthur Heymans
2017-02-22nb/intel/nehalem: Clean nehalem.hArthur Heymans
2017-02-22southbridge/amd: Add LPC bridge acpi path for Family14 and SB800Tobias Diedrich
2017-02-22nb/i945/raminit.c: Fix dll timings on 945GCElyes HAOUAS
2017-02-20nb/i945/raminit: sdram_set_channel_mode Test if DIMM slot 3 is populatedElyes HAOUAS
2017-02-17nb/intel/x4x: Implement resume from S3 suspendArthur Heymans
2017-02-17nb/intel/x4x: Fix raminit on reset pathArthur Heymans
2017-02-14nb/i945/gma.c: Remove writes to FIFO Watermark registersArthur Heymans
2017-02-12nb/i945/gma.c: Change name and type of mmiobase in functions argumentArthur Heymans
2017-02-10ddr3 spd: move accessor code into lib/spd_bin.cPatrick Georgi
2017-02-10ddr3 spd: Rename read_spd_from_cbfs() to read_ddr3_spd_from_cbfs()Patrick Georgi
2017-02-04Only show CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM option when implementedArthur Heymans
2017-02-04drivers/intel/gma/vbt: Add Kconfig symbol for SSC refNico Huber
2017-02-04nb/intel/gm45/igd: Hide IGD while disablingPatrick Rudolph
2017-01-26amd/amdht: Fix format security errorsPaul Menzel
2017-01-25nb/intel/pineview: Make preallocated igd memory a cmos parameterArthur Heymans
2017-01-22nb/x4x/raminit: Fix programming dram timingsArthur Heymans
2017-01-20nb/gm45/gma.c: Fix reported Pixel clockArthur Heymans
2017-01-19nb/amd/ddr3: Make the maximum CDD a signed valueTimothy Pearson
2017-01-14amd/mct: Add default values to highest_rank_count for DDR2Timothy Pearson
2017-01-12amd/mct/ddr2: Remove orphaned Tab_TrefT_k variableTimothy Pearson
2017-01-11amd/mct/ddr3: Fix unintended sign extension warningTimothy Pearson
2017-01-11amd/mct/ddr3: Avoid using uninitialized register address in ECC setupTimothy Pearson
2017-01-11nb/i945/raminit.c: Use Makefile.inc instead of '#include rcven.c'Arthur Heymans
2017-01-11amd/mct/ddr3: Free malloced resources in failure branchesTimothy Pearson
2017-01-11amd/mct/ddr3: Rework memory speed to clock value conversion logicTimothy Pearson
2017-01-11amd/mct/ddr3: Correctly program maximum read latencyTimothy Pearson
2017-01-10amd/mct/ddr3: Allow critical delay delta to go negativeTimothy Pearson
2017-01-10amd/mct/ddr3: Correctly configure CsMux45Timothy Pearson
2017-01-10amd/mct/ddr3: Wait for northbridge P-state transitionsTimothy Pearson
2017-01-10nb/intel/945gc: Hardcode the integrated graphic frequenciesArthur Heymans
2017-01-10amd/mct/ddr3: Fix incorrect DQ mask calculationTimothy Pearson
2017-01-10amd/mct/ddr2|ddr3: Refactor persistent members of DCTStatStrucTimothy Pearson
2017-01-09amd/pi: Make BottomIo position configurableRicardo Ribalda Delgado
2017-01-06nb/intel/*/northbridge.c: Remove #include <device/hypertransport.h>Arthur Heymans
2017-01-06sb/ich7: Use common/gpio.h to set up GPIOsArthur Heymans
2017-01-04amdfam10: Perform major include ".c" cleanupDamien Zammit
2016-12-21nb/i945/early_init.c: Add FSB800 and 1067 to Egress Port Virtual ChannelElyes HAOUAS
2016-12-20nb/intel/haswell: Hook up libgfxinitArthur Heymans
2016-12-18intel/fsp_rangeley: Fix use of __SIMPLE_DEVICE__Kyösti Mälkki
2016-12-18intel cache-as-ram: Move DCACHE_RAM_BASEKyösti Mälkki
2016-12-17nb/x4x: Add other Eaglelake IGD PCI DID to listArthur Heymans
2016-12-16nb/intel/sandybridge/raminit: Separate Sandybridge and IvybridgePatrick Rudolph
2016-12-13nb/intel/gm45: Use lapic udelay in SMMMartin Roth
2016-12-11nb/intel/i945: Make pci_mmio_size a devicetree parameterArthur Heymans
2016-12-11ACPI S3: Flip ACPI_HUGE_LOWMEM_BACKUP defaultKyösti Mälkki
2016-12-11intel/nehalem: Use romstage_handoff for S3Kyösti Mälkki
2016-12-11intel i945 gm45 x4x: Switch to RELOCATABLE_RAMSTAGEKyösti Mälkki
2016-12-11intel/i945: Use romstage_handoff for S3Kyösti Mälkki
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-13 18:50:52 +0000