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path: root/src/northbridge
AgeCommit message (Expand)Author
2015-10-27northbridge/amd/amdfam10: Limit maximum RAM clock to BKDG recommendationsTimothy Pearson
2015-10-26northbridge/amd/amdmct: Fix broken AMD K10 DDR3 memory initalizationTimothy Pearson
2015-10-25AMD Family 0Fh: ensure CONFIG_CBB and CONFIG_CDB have sane valuesJonathan A. Kollasch
2015-10-25northbridge/amd/amdfam10: Enable advanced PCIe setup optionsTimothy Pearson
2015-10-24cpu/amd: Add initial support for AMD Socket G34 processorsTimothy Pearson
2015-10-23Intel: Move MCRS ResourceTemplate outside of _CRS methodMartin Roth
2015-10-23northbridge/amd/amdmct: Fix Family 15h detectionTimothy Pearson
2015-10-23northbridge/amd/amdmct/mct_ddr3: Fix curly brace style violationsTimothy Pearson
2015-10-23northbridge/amd/amdfam10: Fix typo in commentTimothy Pearson
2015-10-22Revert "Remove sandybridge and ivybridge FSP code path"Martin Roth
2015-10-15cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc
2015-10-14Revert "Remove FSP Rangeley SOC and mohonpeak board support"Martin Roth
2015-10-12gma: Consolidate Intel IGD ACPI code some moreNico Huber
2015-10-11Kill lvds_num_lanesVladimir Serbinenko
2015-10-11Derive lvds_dual_channel from EDID timings.Vladimir Serbinenko
2015-10-09nb/intel/sandybridge/raminit: Add edge write discovery checkPatrick Rudolph
2015-10-09northbridge/intel/sandybridge: Do not disable PEG by defaultPatrick Rudolph
2015-10-09northbridge/intel/sandybridge: Enable PEG clock-gating on demandPatrick Rudolph
2015-10-07x86/bootblock: Use LDFLAGS_bootblock to enable garbage collectionAlexandru Gagniuc
2015-10-04northbridge/intel/nehalem: Fix native VGA initNicolas Reinecke
2015-10-03Remove FSP Rangeley SOC and mohonpeak board supportAlexandru Gagniuc
2015-10-03Remove sandybridge and ivybridge FSP code pathAlexandru Gagniuc
2015-10-03sandybridge ivybridge: Treat native init as first class citizenAlexandru Gagniuc
2015-10-01northbridge/intel/gm45: Fix native VGA initAudrey Pearson
2015-09-30amd/family14: Add k10temp thermal zone.Tobias Diedrich
2015-09-24coreboot: move TS_END_ROMSTAGE to one spotAaron Durbin
2015-09-14AGESA S3 support: Fix excessive stack usageKyösti Mälkki
2015-09-09x86: bootblock: remove linking and program flow from build systemAaron Durbin
2015-09-07intel/sandybridge: Do not guard native VGA init by #ifdefsAlexandru Gagniuc
2015-09-07northbridge/amd/amdfam10: Use adequate size for HT speed limit fieldTimothy Pearson
2015-09-07intel i945: Fix native VGA initializationMono
2015-09-07north/intel/sandybridge: Fix native VGA initializationAlexandru Gagniuc
2015-09-07intel: Do not hardcode the position of mrc.cacheAlexandru Gagniuc
2015-09-04bootstate: remove need for #ifdef ENV_RAMSTAGEAaron Durbin
2015-09-04x86: remove cpu_incs as romstage Make variableAaron Durbin
2015-08-31northbridge/intel/gm45/Kconfig: Remove IOMMU symbol choiceMartin Roth
2015-08-31AMD Bettong: Lower the TOM to give more MMIO spacezbao
2015-08-30Kconfig: Remove EXPERT modeAlexandru Gagniuc
2015-08-28edid: Use edid_mode struct to reduce redundancyDavid Hendricks
2015-08-25Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in KconfigMartin Roth
2015-08-18northbridge/amd/amdfam10: Redirect legacy VGA memory access to MMIOTimothy Pearson
2015-08-13amd: raminit sysinfo offset fixAaron Durbin
2015-08-10intel/i945: don't read structs out of uninitialized pointersPatrick Georgi
2015-08-09AMD K8: Avoid duplicate variables in SSDT on multisocket systemsJonathan A. Kollasch
2015-07-29intel/haswell: fix CHROMEOS builds for haswellPatrick Georgi
2015-07-22intel raminit: rewrite timB high adjust calculationPatrick Rudolph
2015-07-22intel raminit: support two DIMMs per channelPatrick Rudolph
2015-07-21Port Fam14 northbridge code to 64bitStefan Reinauer
2015-07-21Revert "northbridge/amd/pi: Add support for memory settings"Marc Jones
2015-07-20northbridge/amd/pi: Add support for memory settingsDave Frodin
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