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Some coreboot project code with my work
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Age
Commit message (
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Author
2013-08-16
Correct spelling of shadow, setting and memory
Paul Menzel
2013-08-15
AMD Richland: Add new graphics device IDs to Family 15, Models 10-1F
Bruce Griffith
2013-08-15
AMD Kabini: Split DSDT into common sections
Mike Loptien
2013-08-09
intel/sandybridge intel/bd82x6x: remove explicit pcie config accesses
Kyösti Mälkki
2013-08-08
ASUS F2A85-M: Split DSDT into common sections (as per Parmer)
Kimarie Hoot
2013-08-05
AMD Kabini: Add map_oprom() function for Vendor/Device IDs
Bruce Griffith
2013-08-05
AMD Kabini: Add northbridge AGESA wrapper (new AMD processor)
Siyuan Wang
2013-08-01
Add directive __SIMPLE_DEVICE__
Kyösti Mälkki
2013-07-31
Drop unused EXTERNAL_MRC_BLOB
Stefan Reinauer
2013-07-16
AMD Fam15tn: Split DSDT into common sections
Steve Goodrich
2013-07-11
Set PCI bus operations at buildtime for ramstage
Kyösti Mälkki
2013-07-10
usbdebug: Move ehci_debug_info allocation
Kyösti Mälkki
2013-07-10
Rename hardwaremain() to main()
Stefan Reinauer
2013-07-10
FUI: reorganize include files
Ronald G. Minnich
2013-07-10
Drop some duplicates of PCI-e config functions
Kyösti Mälkki
2013-07-10
Fix MMCONF_SUPPORT_DEFAULT for ramstage
Kyösti Mälkki
2013-07-09
fox_wtm2: First step support for coreboot-based graphics startup
Ronald G. Minnich
2013-07-09
FOX_WTM2: First pass at FUI.
Ronald G. Minnich
2013-07-04
intel/i5000: Use MMCONF_SUPPORT_DEFAULT
Kyösti Mälkki
2013-07-04
Move select MMCONF_SUPPORT under northbridge (fix)
Kyösti Mälkki
2013-07-04
intel/i945: Use MMCONF_SUPPORT_DEFAULT
Kyösti Mälkki
2013-07-04
intel/sandybridge intel/ivybridge: Use MMCONF_SUPPORT_DEFAULT
Kyösti Mälkki
2013-07-03
Move select MMCONF_SUPPORT under northbridge
Kyösti Mälkki
2013-07-02
Intel GM45, 945, Sandy Bridge: Unify `delay.c` and `udelay.c`
Paul Menzel
2013-07-02
Make setting MAX_PIRQ_LINKs depend on NORTHBRIDGE_VIA_VX900
Dave Frodin
2013-06-28
amd/cimx/rd890/amd.h: Eliminate redefinition of NULL
Bruce Griffith
2013-06-28
amd/agesa/family15/northbridge.c: Delete unused variable
Bruce Griffith
2013-06-28
Add support to enable/disable builtin GbE (again)
Stefan Reinauer
2013-06-27
Revert "Add support to enable/disable builtin GbE"
Kyösti Mälkki
2013-06-25
Vortex86EX northbridge.c : Remove Vortex86DX PCI N/B related code.
Andrew Wu
2013-06-25
intel/sch: Use MMCONF_BASE_ADDRESS
Kyösti Mälkki
2013-06-24
AMD: Drop empty root_complex
Kyösti Mälkki
2013-06-24
AMD Fam15tn: Add support for AGESA runtime allocation in CBMEM
Rudolf Marek
2013-06-24
AMD Fam15tn: Add IOMMU BAR allocation to northbridge
Rudolf Marek
2013-06-22
intel/sandybridge: Locate CBMEM TOC early in ramstage
Kyösti Mälkki
2013-06-22
Add support for DMP Vortex86EX PCI northbridge.
Andrew Wu
2013-06-21
Add support to enable/disable builtin GbE
Stefan Reinauer
2013-06-20
sandybridge: Store MRC cache in CBFS
Patrick Georgi
2013-06-13
AMD: Kconfig cleanup
Kyösti Mälkki
2013-06-10
VX900: Use MIN/MAX from stdlib.h instead of redefining them
Alexandru Gagniuc
2013-06-10
VIA VX900: Add minimal ramstage needed to boot linux
Alexandru Gagniuc
2013-06-10
VX900: Add DDR3 initialization
Alexandru Gagniuc
2013-06-10
VX900: Add support for early romstage
Alexandru Gagniuc
2013-06-07
i945: Add Display defines for int15h handler.
Denis 'GNUtoo' Carikli
2013-06-05
Intel 945: Select LAPIC_MONOTONIC_TIMER for X86EMU_DEBUG_TIMINGS
Denis 'GNUtoo' Carikli
2013-06-04
Move the MARK_GRAPHICS_MEM_WRCOMB to x86 architecture
Ronald G. Minnich
2013-06-04
AMD Northbridge LX: get rid of #include "northbridge/amd/lx/raminit.c"
Christian Gmeiner
2013-06-04
AMD Northbridge LX: convert spd_read_byte() to non-static version
Christian Gmeiner
2013-06-04
AMD Northbridge LX: rename get_systop() to get_top_of_ram()
Christian Gmeiner
2013-06-04
AMD Northbridge LX: include northbridge.h in raminit.c
Christian Gmeiner
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