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AgeCommit message (Expand)Author
2019-10-17nb/intel/nehalem: Only enable_smbus onceArthur Heymans
2019-10-17nb/intel/nehalem: use pmclib to detect S3 resumeArthur Heymans
2019-10-17nb/intel/nehalem: Add some debug outputArthur Heymans
2019-10-17nb/intel/nehalem: Change the output verbosity of raminit timingsArthur Heymans
2019-10-14nb/intel/gm45: Don't run graphics init on s3 resumeArthur Heymans
2019-10-14sb/intel/i82801ix: Add common code to set up LPC IO decode rangesArthur Heymans
2019-10-13nb/intel/nehalem: Start VBOOT in bootblock with a separate verstageArthur Heymans
2019-10-13nb/intel/nehalem: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-10-13sb/intel/ibexpeak: Move some early PCH init after console initArthur Heymans
2019-10-11sb/intel/i82801gx: Move CIR init to a common placeArthur Heymans
2019-10-10nb/intel/pineview/Kconfig: Remove romcc leftoverArthur Heymans
2019-10-08device: Use scan_static_bus() over scan_lpc_bus()Nico Huber
2019-10-06sb/intel/nm10: Fix enabling HPETArthur Heymans
2019-10-06nb/intel/nehalem: Don't run graphic init on S3 resumeArthur Heymans
2019-10-06nb/intel/nehalem: Move PCH init to sb/intel/ibexpeakArthur Heymans
2019-10-06nb/intel/nehalem: Move romstage boilerplate to a common locationArthur Heymans
2019-10-06nb/intel/nehalem: Don't link walkcbfs.S in romstageArthur Heymans
2019-10-06nb/intel/nehalem: Remove bogus GT PM initArthur Heymans
2019-10-06nb/intel/nehalem: Disable PEG and IGD based on devicetreeArthur Heymans
2019-10-06nb/nehalem: Remove bogus MCHBAR writesArthur Heymans
2019-10-05kontron/986lcd-m,roda/rk886ex: Drop secondary PCI resetKyösti Mälkki
2019-10-05intel/i945,i82801gx: Refactor early PCI bridge resetKyösti Mälkki
2019-10-05sb,nb/intel/fsp_rangeley: Rename from xx_DEV_FUNCKyösti Mälkki
2019-10-01intel/i945: Define peg_plugin for potential add-on PCIe cardKyösti Mälkki
2019-10-01intel/i945: Delay bridge VGA IO enable to ramstageKyösti Mälkki
2019-10-01intel/i945: Define p2peg for PCIe x16 slotKyösti Mälkki
2019-10-01intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROLKyösti Mälkki
2019-09-29amdfam_10h-15h: Use ENV_PCI_SIMPLE_DEVICEKyösti Mälkki
2019-09-28nb/via/vx900: Remove some __SIMPLE_DEVICE__ useKyösti Mälkki
2019-09-28nb,sb/intel: Clean up some __BOOTBLOCK__ and __SIMPLE_DEVICE__ useKyösti Mälkki
2019-09-28nb/intel/x4x: Avoid x4x.h header with romcc-bootblockKyösti Mälkki
2019-09-24intel/cpu: Switch older models to TSC_MONOTONIC_TIMERKyösti Mälkki
2019-09-20nb/intel/nehalem: Enabled VBOOT supportPatrick Rudolph
2019-09-17nb/nehalem: Move MMCONF_BASE_ADDRESS to a common placeArthur Heymans
2019-09-15{i945,i82801gx}: Remove unneeded include <cpu/x86/cache.h>Elyes HAOUAS
2019-09-15northbridge: Remove unused include <device/pci_ops.h>Elyes HAOUAS
2019-09-15nb/i945: Remove unused include <cpu/cpu.h>Elyes HAOUAS
2019-09-13drivers/elog: Add elog_boot_notify()Kyösti Mälkki
2019-09-13intel/nehalem: Refactor ACPI S3 detectionKyösti Mälkki
2019-09-12src/{northbridge,soc}: Remove not used #include <elog.h>Elyes HAOUAS
2019-09-12nb/intel/nehalem: Add a header for raminit_tables.cAngel Pons
2019-09-06nb/intel/x4x/raminit: Move dummy reads after JEDEC initArthur Heymans
2019-08-28intel/haswell: Use smm_subregion()Kyösti Mälkki
2019-08-28intel/smm/gen1: Use smm_subregion()Kyösti Mälkki
2019-08-26soc/intel: Use common romstage codeKyösti Mälkki
2019-08-26nb/intel/gm45: Call ddr3_calibrate_zq() only for DDR3 :)Nico Huber
2019-08-26amdfam10: Remove use of __PRE_RAM__Kyösti Mälkki
2019-08-22arch/x86: Add <arch/romstage.h>Kyösti Mälkki
2019-08-21intel/fsp1_0,baytrail,rangeley: Tidy up use of preprocessorKyösti Mälkki
2019-08-20nb/via/vx900: Ensure memory size and base are in rangeJacob Garber
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