summaryrefslogtreecommitdiff
path: root/src/northbridge
AgeCommit message (Expand)Author
2018-11-01src: Add missing include <stdint.h>Elyes HAOUAS
2018-10-31reset: Finalize move to new APINico Huber
2018-10-30{cpu,drivers,nb,sb}/amd: Replace {MSR,MTRR} addresses with macrosElyes HAOUAS
2018-10-30src: Add missing include <stdint.h>Elyes HAOUAS
2018-10-24nb/intel/*: Use 2M TSEG instead of 8M on pre-arrandale hardwareArthur Heymans
2018-10-24nb/intel/*: Account for cbmem_top alignmentArthur Heymans
2018-10-24nb/intel/i945: Fix domain resourcesArthur Heymans
2018-10-23src: Remove unneeded whitespaceElyes HAOUAS
2018-10-23src: Typo fix (cosmetic)Peter Lemenkov
2018-10-22sb/amd/cimx/sb[89]00: Use CF9 resetNico Huber
2018-10-22nb/via/vx900: Use CF9 resetNico Huber
2018-10-22intel: Use CF9 reset (part 1)Patrick Rudolph
2018-10-19nb/intel/nehalem: Remove unneeded whitespaceElyes HAOUAS
2018-10-18cpu/amd: Use common AMD's MSRElyes HAOUAS
2018-10-15nb/intel/x4x: Fix P45 CAPID max frequencyArthur Heymans
2018-10-15nb/intel/x4x: Program read training results to all ranksArthur Heymans
2018-10-11src: Move common IA-32 MSRs to <cpu/x86/msr.h>Elyes HAOUAS
2018-10-11src: Replace MSR addresses with macrosElyes HAOUAS
2018-10-11selfboot: remove bounce buffersRonald G. Minnich
2018-10-08Move compiler.h to commonlibNico Huber
2018-10-08src: Use tabs for indentationElyes HAOUAS
2018-10-08nb/intel/{gm45,i945,pineview}: Use macro instead of GGC addressElyes HAOUAS
2018-09-28src/*: normalize Google copyright headersPatrick Georgi
2018-09-25northbridge: Use 'unsigned int' to bare use of 'unsigned'Elyes HAOUAS
2018-09-21nb/via/vx900: Get rid of device_tElyes HAOUAS
2018-09-20nb/amd/pi/00730F01: use MMIO and performance counters from AGESAPiotr Król
2018-09-18nb/amd/pi/00730F01: Don't use device_t in ramstageElyes HAOUAS
2018-09-16nb/intel/x4x: Don't use cached settings if CPU FSB has been changedArthur Heymans
2018-09-15nb/amd/pi/00730F01: Add initial native IVRS supportTimothy Pearson
2018-09-15nb/amd/pi/00730F01: Initialize IOMMU deviceKyösti Mälkki
2018-09-14nb/intel/sandybridge: Don't add SMBIOS Table 17 entries on resumeNico Huber
2018-09-14complier.h: add __always_inline and use it in code baseAaron Durbin
2018-09-10complier.h: add __noreturn and use it in code baseAaron Durbin
2018-09-05nb/intel/x4x/gma.c: fix skipping of native graphics initStefan Tauner
2018-08-22nb/intel/*/gma.c: Skip NGI when VGA decode is not enabledArthur Heymans
2018-08-21nb/intel/sandybridge/raminit: Move fill_smbios17 to ddr3.cPatrick Rudolph
2018-08-21nb/intel/pineview: Use a common MMCONF_BASE_ADDRESSArthur Heymans
2018-08-21nb/intel/pineview: Use the correct address for the RCVEN strobeArthur Heymans
2018-08-21nb/intel/pineview: Use i2c block read to fetch SPDArthur Heymans
2018-08-20nb/intel/raminit: Remove unused headersPatrick Rudolph
2018-08-20nb/intel/sandybridge/raminit: Fix DIMM type mappingPatrick Rudolph
2018-08-20nb/intel/sandybridge: Fill in DIMM serial numberPatrick Rudolph
2018-08-17sandybridge/raminit_common.c: fix printram statementIru Cai
2018-08-17Fix PCI ACPI _OSC methodsMarc Jones
2018-08-13nb/intel/haswell: Always locate mrc.bin in the COREBOOT fmap regionArthur Heymans
2018-08-10src: Fix typoElyes HAOUAS
2018-08-09src/northbridge: Fix typoElyes HAOUAS
2018-08-08cpu/amd: Correct number of MCA banks clearedMarshall Dawson
2018-08-04x4x/raminit_ddr23: use MCHBAR AND/OR/AND_OR macros [2/2]Felix Held
2018-08-04nehalem/raminit: remove read_mchbar functionsFelix Held
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-09 20:25:52 +0000