summaryrefslogtreecommitdiff
path: root/src/northbridge
AgeCommit message (Expand)Author
2020-03-04nb/intel/nehalem: Use cache.h functionsArthur Heymans
2020-03-04nb/amd/agesa/family14/acpi: Fix commentElyes HAOUAS
2020-03-02nb/intel/sandybridge: Fix VBOOTPatrick Rudolph
2020-02-24treewide: Capitalize 'CMOS'Elyes HAOUAS
2020-02-24src: capitalize 'RAM'Elyes HAOUAS
2020-02-21nb/intel/snb: Add PCI routing table for PEG root portsJames Ye
2020-02-18nb/intel/sandybridge: Add Xeon E3-1200 (v1) hostbridge PCI IDJonathan A. Kollasch
2020-02-18nb/intel/sandybridge: use list of northbridge device IDsJonathan A. Kollasch
2020-02-17nb/amd/pi/00730F01: enable ACS and AER for PCIe portsMichał Żygowski
2020-02-17nb/intel/gm45: Fix typo in console messageElyes HAOUAS
2020-02-17nb/intel/nehalem: Remove unused MRC_CACHE_SIZEElyes HAOUAS
2020-02-12nb/intel/sandybridge/acpi: Fix MMCONF size computationPatrick Rudolph
2020-02-12nb/intel/sandybridge/acpi: Update PEG codePatrick Rudolph
2020-02-06nb/intel/haswell: Fix type definition of dev in PCI_FUNC(dev)Chris Morgan
2020-02-01nb/intel/sandybridge: improve indexed register helper macrosFelix Held
2020-01-30amd/pi/00660F01: Add missing domain_acpi_name functionJorge Fernandez
2020-01-29nb/intel/i945: Use boot path macrosPaul Menzel
2020-01-27nb/intel/sandybridge/raminit_common.h: add missing stdint.h includeFelix Held
2020-01-27nb/intel/sandybridge: replace NORTHBRIDGE with HOST_BRIDGE defineFelix Held
2020-01-26intel/i440bx: Resolve long standing raminit TODOsKeith Hui
2020-01-26intel/i440bx: Add timestamp to RAM initKeith Hui
2020-01-26intel/i440bx: Use smbus_read_byte() for raminit debugKeith Hui
2020-01-16nb/intel/sandybridge: sort LANEBASE_* defines by their addressFelix Held
2020-01-16nb/intel/sandybridge: add macros for byte lane register offsetsFelix Held
2020-01-16nb/intel/sandybridge: refactor code around lane_base[]Felix Held
2020-01-15nb/intel/sandybridge: refactor lane_registers[]Felix Held
2020-01-15nb/intel/sandybridge: drop LyCx(r, x, y) macroFelix Held
2020-01-15nb/intel/sandybridge: Repurpose HOST_BRIDGE macroAngel Pons
2020-01-14intel/nehalem,ibexpeak: Move enable_smbus() callKyösti Mälkki
2020-01-14intel/sandybridge,bd82x6x: Move enable_smbus() callKyösti Mälkki
2020-01-14intel/{gm45,x4x},i82801{ix|jx}: Move enable_smbus() callKyösti Mälkki
2020-01-14intel/{i945,pineview},i82801gx: Move enable_smbus() callKyösti Mälkki
2020-01-14nb/intel/sandybridge: Drop 'or zero' instancesAngel Pons
2020-01-12intel/e7505: Always enable DIMM compatibility checksKyösti Mälkki
2020-01-12intel/e7505: Remove commented out suspicious codeKyösti Mälkki
2020-01-12intel/e7505,i82801dx: Refactor raminitKyösti Mälkki
2020-01-12aopen/dxplplusu,intel/e7505: Move mainboard_romstage_entry()Kyösti Mälkki
2020-01-12intel/e7505,i82801dx: Remove wrapper spd_read_byte()Kyösti Mälkki
2020-01-12asus/{p2b-x,p3b-f},intel/i440bx: Move mainboard_romstage_entry()Kyösti Mälkki
2020-01-12intel/i440bx,i82371: Remove wrapper spd_read_byte()Kyösti Mälkki
2020-01-12asus/p3b-f,intel/i440bx: Move enable/disable_spd() callKyösti Mälkki
2020-01-11nb/intel/sandybridge: Tidy up raminit codeAngel Pons
2020-01-10nb/intel/{i945,sandybridge}/bootblock.c: Fix typoElyes HAOUAS
2020-01-10nb/intel/sandybridge: Add a bunch of MCHBAR definesAngel Pons
2020-01-09device,sb/intel: Move SMBus host controller prototypesKyösti Mälkki
2020-01-09nb/intel/{i945,x4x,pineview}: Remove wrapper spd_read_byte()Kyösti Mälkki
2020-01-09nb/amd/pi/00730F01/state_machine: Add lost optionsMichał Żygowski
2020-01-09amd/agesa/state_machine: Add BeforeInitLate hooksMichał Żygowski
2020-01-09drivers/pc80/rtc: Separate {get|set}_option() prototypesKyösti Mälkki
2020-01-09nb/intel/sandybridge: Make MCHBAR arithmetics consistentAngel Pons
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-19 12:02:24 +0000