coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-09-21	src/security: Drop unneeded empty lines	Elyes HAOUAS
2020-07-31	security/intel/txt: Add Intel TXT support	Philipp Deppenwiese
2020-07-14	src: Remove unused 'include <stdint.h>	Elyes HAOUAS
2020-07-06	arch/x86: Remove RELOCATABLE_RAMSTAGE	Kyösti Mälkki
2020-06-17	treewide: Replace CONFIG(ARCH_xx) tests	Kyösti Mälkki
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-08	{security,soc}/*/Kconfig: Replace GPLv2 long form headers with SPDX header	Elyes HAOUAS
2020-05-02	acpi: Move ACPI table support out of arch/x86 (3/5)	Furquan Shaikh
2020-04-04	src/security: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-17	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi
2019-11-21	drivers/intel/fsp1_0: Drop support	Arthur Heymans
2019-11-18	include: Make stdbool.h a separate file	Julius Werner
2019-10-20	security/memory: Add x86_64 support	Patrick Rudolph
2019-07-02	security/memory: Clear memory in ramstage	Patrick Rudolph
2019-06-27	security: Add memory subfolder	Patrick Rudolph