coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-10-22	sec/intel/txt: Split MTRR setup ASM code into a macro	Angel Pons
2020-10-22	sec/intel/txt: Add `enable_getsec_or_reset` function	Angel Pons
2020-10-22	sec/intel/txt: Extract BIOS ACM loading into a function	Angel Pons
2020-10-22	sec/intel/txt: Only run LockConfig for LT-SX	Angel Pons
2020-10-22	sec/intel/txt: Always run SCHECK on regular boots	Angel Pons
2020-10-22	sec/intel/txt: Allow skipping ACM NOP function	Angel Pons
2020-10-22	sec/intel/txt/ramstage.c: Do not init the heap on S3 resume	Angel Pons
2020-10-22	sec/intel/txt/ramstage.c: Extract heap init into a function	Angel Pons
2020-10-22	sec/intel/txt: Add and fill in BIOS Specification info	Angel Pons
2020-10-22	sec/intel/txt/common.c: Only log ACM error on failure	Angel Pons
2020-10-22	sec/intel/txt: Move DPR size to Kconfig	Angel Pons
2020-10-22	security/vboot: Remove all tpm 1.2 functions for mrc hash in the tpm	Shelley Chen
2020-10-20	mrc_cache: Add tpm_hash_index field to cache_region struct	Shelley Chen
2020-10-20	security/vboot: Add new TPM NVRAM index MRC_RW_HASH_NV_INDEX	Shelley Chen
2020-10-20	security/vboot: Make mrc_cache hash functions generic	Shelley Chen
2020-10-20	mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver	Shelley Chen
2020-10-20	mrc_cache: Add config MRC_SAVE_HASH_IN_TPM	Shelley Chen
2020-10-19	security/vboot: Rename mem_init.h to mrc_cache_hash_tpm.h	Shelley Chen
2020-10-17	intel/txt: Add `txt_get_chipset_dpr` function	Angel Pons
2020-10-17	security/intel/txt: Improve MTRR setup for GETSEC[ENTERACCS]	Angel Pons
2020-10-17	sec/intel/txt: Bail if var MTRRs cannot snugly cache the BIOS ACM	Angel Pons
2020-10-15	sec/intel/txt/getsec_enteraccs.S: Save and restore MTRR_DEF_TYPE	Arthur Heymans
2020-10-15	security/intel/txt: Use `smm_region()` to get TSEG base	Angel Pons
2020-10-12	security/intel/txt: Add and use DPR register layout	Angel Pons
2020-10-12	security/intel/txt: Clean up includes	Angel Pons
2020-10-12	security/intel/stm: Add options for STM build	Eugene Myers
2020-10-08	security/intel/txt: Print chipset as hex value	Christian Walter
2020-10-01	security/intel/stm: Fix size_t printf format error	Felix Held
2020-09-30	security/intel/stm: Fix size_t printf format error	Eugene D Myers
2020-09-21	src/security: Drop unneeded empty lines	Elyes HAOUAS
2020-09-21	security/tpm/tss/tcg-2.0: add const to marshalling functions	Caveh Jalali
2020-08-30	security/intel/txt/getsec.c: Do not check lock bit	Angel Pons
2020-08-30	security/intel/txt: Add missing definitions	Angel Pons
2020-08-20	drivers/spi/tpm: Enable long cr50 ready pulses for Tiger Lake systems	Jes Klinke
2020-08-18	src: Remove unused 'include <lib.h>'	Elyes HAOUAS
2020-08-18	src: Remove unused 'include <boot_device.h>'	Elyes HAOUAS
2020-08-13	security/vboot/Makefile.inc: Update regions-for-file function	Sridhar Siricilla
2020-08-07	security/intel/txt: Fix variable MTRR handling	Angel Pons
2020-08-07	security/intel/txt: Allow using CF9 reset, too	Angel Pons
2020-08-06	security/intel/txt: Avoid shifting by a negative value	John Zhao
2020-07-31	security/intel/txt: Add Intel TXT support	Philipp Deppenwiese
2020-07-26	src: Change BOOL CONFIG_ to CONFIG() in comments & strings	Martin Roth
2020-07-26	src: Remove unused 'include <cbmem.h>'	Elyes HAOUAS
2020-07-21	security/intel/stm: Add missing <stdbool.h>	Angel Pons
2020-07-15	security/vboot: ensure that NVMEM is saved on every kernel space write	Jett Rink
2020-07-14	src: Remove unused 'include <cpu/x86/msr.h>'	Elyes HAOUAS
2020-07-14	src: Remove unused 'include <stdint.h>	Elyes HAOUAS
2020-07-09	security/vboot/secdata_tpm.c: Drop dead code	Angel Pons
2020-07-09	security/tpm/tss/tcg-1.2/tss.c: Drop dead code	Angel Pons
2020-07-08	security/vboot: Allow files to go into only RW-A or RW-B region	Martin Roth