coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2021-01-30	soc/intel: Replace `SA_PCIEX_LENGTH` Kconfig options	Angel Pons
2021-01-19	security/tpm/tss/tcg-1.2/tss.c: Use __func__	Elyes HAOUAS
2021-01-18	security/intel/stm/StmPlatformSmm.c: Remove repeated word	Elyes HAOUAS
2021-01-18	security/vboot/secdata_tpm.c: Remove repeated word	Elyes HAOUAS
2021-01-15	build system: Always add coreboot.pre dependency to intermediates	Patrick Georgi
2021-01-14	build system: Structure and serialize INTERMEDIATE	Patrick Georgi
2021-01-08	*/Makefile.inc: Add some INTERMEDIATE targets to .PHONY	Arthur Heymans
2021-01-07	security/intel/txt: Don't run SCHECK on CBnT	Arthur Heymans
2021-01-04	security/intel/txt/ramstage.c: Fix clearing secrets on CBNT	Arthur Heymans
2020-12-29	sec/intel/txt/Kconfig: Make TXT HEAP and SINIT size configurable	Arthur Heymans
2020-12-03	cbfs: Add verification for RO CBFS metadata hash	Julius Werner
2020-12-02	cbfs: Simplify load/map API names, remove type arguments	Julius Werner
2020-12-02	cbfs: Move more stuff into cbfs_boot_lookup()	Julius Werner
2020-11-21	cbfs: Add metadata cache	Julius Werner
2020-11-18	vboot: stop implementing VbExDisplayScreen	Joel Kitching
2020-11-17	src: Add missing 'include <console/console.h>'	Elyes HAOUAS
2020-11-10	sec/intel/cbnt: Stitch in ACMs in the coreboot image	Arthur Heymans
2020-11-06	security/vboot: Add Kconfig symbol to set hashing block size	Martin Roth
2020-11-04	haswell: Add Intel TXT support in romstage	Angel Pons
2020-11-04	sec/intel/txt: Add support for running SCLEAN in romstage	Angel Pons
2020-10-28	sec/intel/txt/Kconfig: Remove the menu for including ACMs	Arthur Heymans
2020-10-28	sec/intel/txt/Makefile.inc: Include ACMs using Kconfig variables	Arthur Heymans
2020-10-28	security/vboot: fix policy digest for nvmem spaces	Andrey Pronin
2020-10-26	vboot: Disable vboot functions in SMM	Julius Werner
2020-10-26	security/tpm/tspi/crtm: Add line break to debug messages	Frans Hendriks
2020-10-22	sec/intel/txt: Split MTRR setup ASM code into a macro	Angel Pons
2020-10-22	sec/intel/txt: Add `enable_getsec_or_reset` function	Angel Pons
2020-10-22	sec/intel/txt: Extract BIOS ACM loading into a function	Angel Pons
2020-10-22	sec/intel/txt: Only run LockConfig for LT-SX	Angel Pons
2020-10-22	sec/intel/txt: Always run SCHECK on regular boots	Angel Pons
2020-10-22	sec/intel/txt: Allow skipping ACM NOP function	Angel Pons
2020-10-22	sec/intel/txt/ramstage.c: Do not init the heap on S3 resume	Angel Pons
2020-10-22	sec/intel/txt/ramstage.c: Extract heap init into a function	Angel Pons
2020-10-22	sec/intel/txt: Add and fill in BIOS Specification info	Angel Pons
2020-10-22	sec/intel/txt/common.c: Only log ACM error on failure	Angel Pons
2020-10-22	sec/intel/txt: Move DPR size to Kconfig	Angel Pons
2020-10-22	security/vboot: Remove all tpm 1.2 functions for mrc hash in the tpm	Shelley Chen
2020-10-20	mrc_cache: Add tpm_hash_index field to cache_region struct	Shelley Chen
2020-10-20	security/vboot: Add new TPM NVRAM index MRC_RW_HASH_NV_INDEX	Shelley Chen
2020-10-20	security/vboot: Make mrc_cache hash functions generic	Shelley Chen
2020-10-20	mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver	Shelley Chen
2020-10-20	mrc_cache: Add config MRC_SAVE_HASH_IN_TPM	Shelley Chen
2020-10-19	security/vboot: Rename mem_init.h to mrc_cache_hash_tpm.h	Shelley Chen
2020-10-17	intel/txt: Add `txt_get_chipset_dpr` function	Angel Pons
2020-10-17	security/intel/txt: Improve MTRR setup for GETSEC[ENTERACCS]	Angel Pons
2020-10-17	sec/intel/txt: Bail if var MTRRs cannot snugly cache the BIOS ACM	Angel Pons
2020-10-15	sec/intel/txt/getsec_enteraccs.S: Save and restore MTRR_DEF_TYPE	Arthur Heymans
2020-10-15	security/intel/txt: Use `smm_region()` to get TSEG base	Angel Pons
2020-10-12	security/intel/txt: Add and use DPR register layout	Angel Pons
2020-10-12	security/intel/txt: Clean up includes	Angel Pons