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path: root/src/security
AgeCommit message (Expand)Author
2020-11-10sec/intel/cbnt: Stitch in ACMs in the coreboot imageArthur Heymans
2020-11-06security/vboot: Add Kconfig symbol to set hashing block sizeMartin Roth
2020-11-04haswell: Add Intel TXT support in romstageAngel Pons
2020-11-04sec/intel/txt: Add support for running SCLEAN in romstageAngel Pons
2020-10-28sec/intel/txt/Kconfig: Remove the menu for including ACMsArthur Heymans
2020-10-28sec/intel/txt/Makefile.inc: Include ACMs using Kconfig variablesArthur Heymans
2020-10-28security/vboot: fix policy digest for nvmem spacesAndrey Pronin
2020-10-26vboot: Disable vboot functions in SMMJulius Werner
2020-10-26security/tpm/tspi/crtm: Add line break to debug messagesFrans Hendriks
2020-10-22sec/intel/txt: Split MTRR setup ASM code into a macroAngel Pons
2020-10-22sec/intel/txt: Add `enable_getsec_or_reset` functionAngel Pons
2020-10-22sec/intel/txt: Extract BIOS ACM loading into a functionAngel Pons
2020-10-22sec/intel/txt: Only run LockConfig for LT-SXAngel Pons
2020-10-22sec/intel/txt: Always run SCHECK on regular bootsAngel Pons
2020-10-22sec/intel/txt: Allow skipping ACM NOP functionAngel Pons
2020-10-22sec/intel/txt/ramstage.c: Do not init the heap on S3 resumeAngel Pons
2020-10-22sec/intel/txt/ramstage.c: Extract heap init into a functionAngel Pons
2020-10-22sec/intel/txt: Add and fill in BIOS Specification infoAngel Pons
2020-10-22sec/intel/txt/common.c: Only log ACM error on failureAngel Pons
2020-10-22sec/intel/txt: Move DPR size to KconfigAngel Pons
2020-10-22security/vboot: Remove all tpm 1.2 functions for mrc hash in the tpmShelley Chen
2020-10-20mrc_cache: Add tpm_hash_index field to cache_region structShelley Chen
2020-10-20security/vboot: Add new TPM NVRAM index MRC_RW_HASH_NV_INDEXShelley Chen
2020-10-20security/vboot: Make mrc_cache hash functions genericShelley Chen
2020-10-20mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driverShelley Chen
2020-10-20mrc_cache: Add config MRC_SAVE_HASH_IN_TPMShelley Chen
2020-10-19security/vboot: Rename mem_init.h to mrc_cache_hash_tpm.hShelley Chen
2020-10-17intel/txt: Add `txt_get_chipset_dpr` functionAngel Pons
2020-10-17security/intel/txt: Improve MTRR setup for GETSEC[ENTERACCS]Angel Pons
2020-10-17sec/intel/txt: Bail if var MTRRs cannot snugly cache the BIOS ACMAngel Pons
2020-10-15sec/intel/txt/getsec_enteraccs.S: Save and restore MTRR_DEF_TYPEArthur Heymans
2020-10-15security/intel/txt: Use `smm_region()` to get TSEG baseAngel Pons
2020-10-12security/intel/txt: Add and use DPR register layoutAngel Pons
2020-10-12security/intel/txt: Clean up includesAngel Pons
2020-10-12security/intel/stm: Add options for STM buildEugene Myers
2020-10-08security/intel/txt: Print chipset as hex valueChristian Walter
2020-10-01security/intel/stm: Fix size_t printf format errorFelix Held
2020-09-30security/intel/stm: Fix size_t printf format errorEugene D Myers
2020-09-21src/security: Drop unneeded empty linesElyes HAOUAS
2020-09-21security/tpm/tss/tcg-2.0: add const to marshalling functionsCaveh Jalali
2020-08-30security/intel/txt/getsec.c: Do not check lock bitAngel Pons
2020-08-30security/intel/txt: Add missing definitionsAngel Pons
2020-08-20drivers/spi/tpm: Enable long cr50 ready pulses for Tiger Lake systemsJes Klinke
2020-08-18src: Remove unused 'include <lib.h>'Elyes HAOUAS
2020-08-18src: Remove unused 'include <boot_device.h>'Elyes HAOUAS
2020-08-13security/vboot/Makefile.inc: Update regions-for-file functionSridhar Siricilla
2020-08-07security/intel/txt: Fix variable MTRR handlingAngel Pons
2020-08-07security/intel/txt: Allow using CF9 reset, tooAngel Pons
2020-08-06security/intel/txt: Avoid shifting by a negative valueJohn Zhao
2020-07-31security/intel/txt: Add Intel TXT supportPhilipp Deppenwiese