| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2021-05-05 | soc/amd/cezanne/agesa_acpi: add add_agesa_fsp_acpi_table call | Felix Held | |
| this adds the ALIB SSDT that gets passed from the FSP to coreboot via a HOB. BUG=b:185481298 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I8a7dae5789eee442b321ddf276494eb53fc5f499 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52904 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt Papageorge <matthewpapa07@gmail.com> Reviewed-by: Raul Rangel <rrangel@chromium.org> | |||
| 2021-05-05 | soc/amd/cezanne/agesa_acpi: add and call agesa_write_acpi_tables | Felix Held | |
| This function will be used to add some SSDTs. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ia88cb5ea483850a8659f3bae8040c82eb2735d26 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52902 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com> | |||
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index : coreboot | |
| Some coreboot project code with my work | vimacs |
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