coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2021-05-14	soc/amd/cezanne: Enable GFX HDA FSP UPD	Karthikeyan Ramasubramanian
2021-05-13	soc/amd: factor out acpigen_write_alib_dptc to common code	Felix Held
2021-05-13	soc/amd/cezanne/root_complex: generate DPTC ACPI method	Felix Held
2021-05-12	soc/amd/cezanne/chip.h: add DPTC and tablet mode options	Felix Held
2021-05-12	soc/amd{common,cezanne}: Move pcie_gpp.c to common	Raul E Rangel
2021-05-10	soc/amd/cezanne: Force resets to be cold	Marshall Dawson
2021-05-10	cezanne/psp_verstage: update SRAM address	Kangheui Won
2021-05-10	amd/cezanne: verify transfer buffer in bootblock	Kangheui Won
2021-05-10	psp_verstage: differentiate bios entry	Kangheui Won
2021-05-10	psp_verstage: move platform-specific code to chipset.c	Kangheui Won
2021-05-10	cezanne/psp_verstage: clean up duplicated target	Kangheui Won
2021-05-10	cezanne/psp_verstage: populate a/b firmware	Kangheui Won
2021-05-09	soc/amd/cezanne: Generate PCI GPP ACPI names	Raul E Rangel
2021-05-09	soc/amd/cezanne: Enable GNB IO-APIC _PRT	Raul E Rangel
2021-05-09	soc/amd/cezanne: add GNB IOAPIC support	Felix Held
2021-05-09	soc/amd/cezanne: Generate PCI routing table	Raul E Rangel
2021-05-09	soc/amd/cezanne: Populate PCI_INTR registers	Raul E Rangel
2021-05-08	soc/amd/cezanne/acpi/soc: call WAL1 for AC/DC state ALIB call	Felix Held
2021-05-05	soc/amd/cezanne/agesa_acpi: add add_agesa_fsp_acpi_table call	Felix Held
2021-05-05	soc/amd/cezanne/agesa_acpi: add and call agesa_write_acpi_tables	Felix Held
2021-05-02	soc/amd/cezanne: add verstage files	Kangheui Won
2021-04-30	amd/cezanne: Add telemetry setting to UPD	Chris Wang
2021-04-29	soc/amd/cezanne: Enable Audio Co-processor driver	Karthikeyan Ramasubramanian
2021-04-28	soc/amd/cezanne: copy psp_transfer.h from picasso	Kangheui Won
2021-04-28	soc/amd/cezanne: copy Kconfig options for psp_verstage	Kangheui Won
2021-04-26	soc/amd/cezanne: Update STAPM vars with units	Martin Roth
2021-04-26	amd/cezanne: Add slow_ppt_time & thermctl_limit to UPD	Martin Roth
2021-04-26	soc/amd/cezanne/fsp_m_params: Configure the s0i3_enable UPD	Karthikeyan Ramasubramanian
2021-04-26	soc/amd/cezanne,picasso/Kconfig: add help text for MAX_CPUS	Felix Held
2021-04-26	soc/amd/cezanne & picasso: Add Kconfig for hardcoded Soft Fuse bits	Martin Roth
2021-04-23	soc/amd/cezanne/cpu: make sure that MAX_CPUS isn't overridden	Felix Held
2021-04-23	soc/amd/cezanne: fix i2c compiler errors on non-x86	Kangheui Won
2021-04-22	guybrush: Add Kconfig for PSP eSPI and port80	Rob Barnes
2021-04-21	soc/amd/{cezanne,common}/acpi: Add _OSC method	Raul E Rangel
2021-04-21	soc/amd/cezanne: add SMU settings to devicetree	Felix Held
2021-04-21	soc/amd/cezanne: add downcoring and SMT disable settings to devicetree	Felix Held
2021-04-21	soc/amd/cezanne/chip.h: include missing types.h	Felix Held
2021-04-21	soc/amd/cezanne: Add support for C-state 3	Raul E Rangel
2021-04-20	soc/amd/{common,cezanne}: Add uPEP device	Raul E Rangel
2021-04-19	Revert "soc/amd/cezanne: Add support to perform early EC sync"	Karthikeyan Ramasubramanian
2021-04-18	soc/amd/cezanne/Kconfig: add missing ACPI_BERT and ACPI_BERT_SIZE	Felix Held
2021-04-16	soc/amd/cezanne: Update FADT to support S0i3	Jason Glenesk
2021-04-16	soc/amd/cezanne: Add modern standby option to chip config	Mathew King
2021-04-16	soc/amd/cezanne: Port ACPI p-state and c-state entries from picasso	Jason Glenesk
2021-04-16	soc/amd/cezanne: Add uart controllers to chipset.cb	Ivy Jian
2021-04-16	soc/amd/cezanne: Select VBNV_CMOS	Raul E Rangel
2021-04-14	soc/amd/cezanne/fch: process ACPI PM/GPE and GPIO events	Felix Held
2021-04-14	soc/amd/cezanne: save chipset state to CBMEM	Martin Roth
2021-04-10	soc/amd/cezanne: Set Power state after power failure	Karthikeyan Ramasubramanian
2021-04-10	soc/amd/cezanne: Add GRXS and GTXS method	Eric Lai