coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2019-03-04	arch/io.h: Drop unnecessary include	Kyösti Mälkki
2019-03-01	device/pci: Fix PCI accessor headers	Kyösti Mälkki
2019-01-06	device: Use pcidev_path_on_root()	Kyösti Mälkki
2018-12-05	soc/amd/stoneyridge: Run romstage mainboard code before AGESA	Martin Roth
2018-10-11	amd/stoneyridge: Indicate STAPM units in their name	Richard Spiegel
2018-10-08	Move compiler.h to commonlib	Nico Huber
2018-09-24	soc/amd/stoneyridge/romstage.c: Move STAPM code to SOC specific	Richard Spiegel
2018-09-20	soc/amd/stoneyridge/romstage.c: Remove obsolete comment	Richard Spiegel
2018-06-12	stoneyridge: Move agesa out of bootblock	Raul E Rangel
2018-06-04	soc/{amd,intel}: Use postcar_frame_add_romcache()	Nico Huber
2018-05-31	soc/{amd,intel}: Use CACHE_ROM_(BASE\|SIZE)	Nico Huber
2018-05-25	soc/amd/stoneyridge: Increment boot_count on non-S3 boots	Daniel Kurtz
2018-04-24	compiler.h: add __weak macro	Aaron Durbin
2018-04-13	soc/amd/stoneyridge: add a romstage hook for mainboards	Martin Roth
2018-04-10	soc/amd/stoneyridege: Create AP jump structure	Richard Spiegel
2018-02-12	amd/stoneyridge: Add S3 support to POST	Marshall Dawson
2017-12-15	soc/amd/common: Update agesawrapper_call.h	Richard Spiegel
2017-12-12	soc/amd/common: Move Agesa related headers	Richard Spiegel
2017-11-13	soc/amd/stoneyridge: Fix DRAM clear check	Marshall Dawson
2017-11-10	soc/amd/stoneyridge: Add UMA settings to devicetree	Aaron Durbin
2017-11-10	soc/amd/common: Add DRAM clear option to northbridge.c	Richard Spiegel
2017-10-02	amd/stoneyridge: Remove 16MB cbmem assert	Marshall Dawson
2017-09-27	soc/amd/stoneyridge: Add postcar stage	Marshall Dawson
2017-09-27	amd/stoneyridge: Move AmdInitEnv to ramstage	Marshall Dawson
2017-09-27	amd/stoneyridge: Convert MP init to mp_init_with_smm	Marshall Dawson
2017-08-14	stoneyridge: Rename hudson to southbridge	Marc Jones
2017-07-27	soc/amd/common: Convert to C_ENVIRONMENT_BOOTBLOCK	Marshall Dawson