coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2017-12-12	soc/amd/common: Move Agesa related headers	Richard Spiegel
2017-12-11	soc/amd/common: Move files to common/block	Richard Spiegel
2017-12-11	soc/amd/stoneyridge: Enable SPI writes	John E. Kabat Jr
2017-12-09	soc/amd/stoneyridge/include: delete amd_pci_int_types.h	Richard Spiegel
2017-12-08	soc/amd/stoneyridge: Add RO_REGION_ONLY	Marc Jones
2017-12-07	amd/stoneyridge: Delete early_setup.c	Richard Spiegel
2017-12-07	amd/stoneyridge/lpc.c: Use new wide IO functions	Richard Spiegel
2017-12-07	amd/stoneyridge: Create new wide IO functions	Richard Spiegel
2017-12-07	amd/stoneyridge: Create new name/IRQ association	Richard Spiegel
2017-12-06	soc/amd/stoneyridge: Add USB OC support	Marc Jones
2017-12-06	soc/amd/stoneyridge: Add XHCI PM register access functions	Marc Jones
2017-12-04	amd/stoneyridge: Transfer functions from early_setup.c to southbridge.c	Richard Spiegel
2017-12-02	soc/amd/stoneyridge: Add GPIO40 to GPIO list	Martin Roth
2017-12-02	soc/amd/stoneyridge: Add RunOnAP support	Marc Jones
2017-12-01	soc/amd/stoney: clean up and update reset.c	Martin Roth
2017-11-30	amd/{hudson,stoneyridge}: fix out of bounds read	Richard Spiegel
2017-11-29	soc/amd/stoneyridge: Add mainboard call for SPD values	Marc Jones
2017-11-28	AMD platforms: Fix ASL comment that implies "\_SB" is southbridge	Martin Roth
2017-11-23	Constify struct cpu_device_id instances	Jonathan Neuschäfer
2017-11-23	soc/amd/stoneyridge: Get entire DDR4 SPD	Marc Jones
2017-11-22	Create SOC description file soc.asl	Richard Spiegel
2017-11-21	soc/amd/stoneyridge: Add ELOG to SMM	John E. Kabat Jr
2017-11-21	amd/stoneyridge/spi: Fix reads greater than 5 bytes	Marshall Dawson
2017-11-20	amd/stoneyridge: Fix SPD files and functions camel case	Marc Jones
2017-11-17	Move amd/stoneyridge/include/amd_pci_int_defs.h to include/soc/	Richard Spiegel
2017-11-17	amd/stoneyridge: Enable SMI trap on SlpTyp	Marshall Dawson
2017-11-17	amd/stoneyridge: Add SlpTyp SMI handler	Marshall Dawson
2017-11-17	amd/stoneyridge: Add SPI controller driver	Marshall Dawson
2017-11-15	mb/{amd/gardenia,google/kahlee}: move carrizo_fch.asl code to soc	Richard Spiegel
2017-11-14	soc/amd/stoneyridge: Remove direct AGESA header includes	Martin Roth
2017-11-14	soc/amd/stoneyridge: Load SMU fimware using PSP	Marshall Dawson
2017-11-14	amd/stoneyridge: Add generic IMC sleep and wakeup	Marshall Dawson
2017-11-14	amd/stoneyridge: Replace BIT(n) in southbridge	Marshall Dawson
2017-11-14	amd/stoneyridge: Define bits for AcpiConfig	Marshall Dawson
2017-11-13	soc/amd/stoneyridge: Add CPU PPKG ASL	Marc Jones
2017-11-13	soc/amd/stoneyridge: Add GNVS variables for thermal control	Marc Jones
2017-11-13	soc/amd/stoneyridge: Fix DRAM clear check	Marshall Dawson
2017-11-10	soc/amd/stoneyridge: Add UMA settings to devicetree	Aaron Durbin
2017-11-10	amd/stoneyridge: Implement vboot_platform_is_resuming	Marshall Dawson
2017-11-10	amd/stoneyridge: Add function to find Pm1EvtBlk base	Marshall Dawson
2017-11-10	amd/stoneyridge: Remove dead southbridge definitions	Marshall Dawson
2017-11-10	amd/stoneyridge: Add more ACPI register definitions	Marshall Dawson
2017-11-10	amd/stoneyridge: Use the new generic acpi_sleep_from_pm1	Marshall Dawson
2017-11-10	amd/stoneyridge: Select AMD common sleep states	Marshall Dawson
2017-11-10	soc/amd/stoneyridge: Use uint8_t as type for SPD address	Richard Spiegel
2017-11-10	soc/amd/stoneyridge: Simplify and fix SMBUS code	Richard Spiegel
2017-11-10	soc/amd/common: Add DRAM clear option to northbridge.c	Richard Spiegel
2017-11-10	src/soc/amd/stoneyridge/southbridge.h: Fix prototypes	Richard Spiegel
2017-11-09	soc/amd/stoneyridge: Fix and clean lpc.c	Richard Spiegel
2017-11-09	src/soc/amd/stoneyridge/southbridge.h: Remove unused prototypes	Richard Spiegel