coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-12-11	soc/amd/picasso: move UART Kconfig options to common folder	Felix Held
2020-12-11	soc/amd/picasso: rename PICASSO_CONSOLE_UART to AMD_SOC_CONSOLE_UART	Felix Held
2020-12-11	soc/amd/piasso,cezanne: add warning about using all-y in Makefile.inc	Felix Held
2020-12-11	soc/amd/picasso: use all-y for aoac target	Felix Held
2020-12-11	soc/amd/picasso/aoac: only check FCH_AOAC_UART_FOR_CONSOLE if used	Felix Held
2020-12-10	soc/amd/stoneyridge/reset: use port and bit defines from cf9_reset.h	Felix Held
2020-12-10	soc/amd/picasso/reset: use port and bit defines from cf9_reset.h	Felix Held
2020-12-10	soc/amd/picasso/reset: remove leftover PCI includes	Felix Held
2020-12-09	soc/amd/cezanne: print APU family and model in bootblock_soc_init	Felix Held
2020-12-09	soc/amd/cezanne: add basic early FCH initialization to bootblock	Felix Held
2020-12-09	soc/amd/cezanne: add common SMBus code to build	Felix Held
2020-12-09	soc/amd/cezanne: call bootblock_main_with_basetime in bootblock_c_entry	Felix Held
2020-12-09	soc/amd/picasso,stoneyridge: drop unused BIOSRAM offset defines	Felix Held
2020-12-09	soc/amd/picasso: Rename SD_EMMC_EMMC_DDR_52 to SD_EMMC_EMMC_DDR_104	Raul E Rangel
2020-12-09	soc/amd: Remove Kconfig BOOTBLOCK_ADDR	Kyösti Mälkki
2020-12-09	soc/amd: Remove Kconfig X86_RESET_VECTOR	Kyösti Mälkki
2020-12-09	soc/amd/picasso/southbridge: drop unused sb_enable	Felix Held
2020-12-09	soc/amd/picasso: split southbridge into bootblock and ramstage code	Felix Held
2020-12-09	soc/amd/cezanne: select common ACPIMMIO block	Felix Held
2020-12-09	soc/amd: factor out functionality to print last reset source	Felix Held
2020-12-09	soc/amd/common/block/acpimmio: use all-y for mmio_util target	Felix Held
2020-12-09	soc/amd: factor out legacy I/O and cf9 decode enable functions	Felix Held
2020-12-09	soc/amd/common/block/smbus: refactor fch_smbus_init	Felix Held
2020-12-09	soc/amd: factor out PM_DECODE_EN register definitions	Felix Held
2020-12-09	soc/amd: remove unused PM_ISA_CONTROL definitions	Felix Held
2020-12-09	soc/amd/stoneyridge/southbridge: make sb_disable_4dw_burst static	Felix Held
2020-12-06	soc/amd/picasso: drop unused cpu/amd/mtrr from Makefile	Felix Held
2020-12-06	soc/amd/cezanne: add config.c and minimal chip.h	Felix Held
2020-12-06	soc/amd/picasso/config: add comment about cfg never being NULL	Felix Held
2020-12-06	soc/amd/picasso: remove config_t typedef	Felix Held
2020-12-06	soc/amd/picasso/chip.h: remove unneeded extern pci_domain_ops	Felix Held
2020-12-06	soc/amd/stoneyridge: remove unused config_t typedef	Felix Held
2020-12-06	soc/amd/stoneyridge/chip.h: remove unneeded extern pci_domain_ops	Felix Held
2020-12-06	soc/amd/stoneyridge/acpi/sb_fch: use existing base address defines	Felix Held
2020-12-06	soc/amd/picasso/Makefile: use all-y for adding config.c to the build	Felix Held
2020-12-06	soc/amd/cezanne: use common TSC and monotonic timer code	Felix Held
2020-12-06	soc/amd: factor out common family 17h&19h TSC and monotonic timer code	Felix Held
2020-12-06	soc/amd/common/block/cpu: move Makefile guards into subfolders	Felix Held
2020-12-05	soc/amd/stoneyridge: order selected Kconfig options alphabetically	Felix Held
2020-12-05	soc/amd: Fix X86_RESET_VECTOR location in comments	Kyösti Mälkki
2020-12-05	amd_blobs: Always set default paths	Nico Huber
2020-12-05	soc/amd/picasso/tsc: fix clock divisor range check	Felix Held
2020-12-05	soc/amd/cezanne: add skeleton for new SoC	Felix Held
2020-12-04	soc/amd/picassso/acpi: increase MMIO region size of GPIO controller	Felix Held
2020-12-04	soc/amd: move smi_util to common block	Felix Held
2020-12-03	src: Remove redundant use of ACPI offset(0)	Elyes HAOUAS
2020-12-02	cbfs: Simplify load/map API names, remove type arguments	Julius Werner
2020-12-02	cbfs: Enable CBFS mcache on most chipsets	Julius Werner
2020-12-02	soc/amd: factor out common SMI/SCI enums and function prototypes	Felix Held
2020-12-02	soc/amd/common/smbus: remove misleading definition	Felix Held