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path: root/src/soc/imgtec
AgeCommit message (Expand)Author
2017-05-05drivers/spi: Re-factor spi_crop_chunkFurquan Shaikh
2016-12-23spi: Get rid of SPI_ATOMIC_SEQUENCINGFurquan Shaikh
2016-12-05spi: Define and use spi_ctrlr structureFurquan Shaikh
2016-12-05spi: Pass pointer to spi_slave structure in spi_setup_slaveFurquan Shaikh
2016-12-05spi: Fix parameter types for spi functionsFurquan Shaikh
2016-11-22spi: Get rid of max_transfer_size parameter in spi_slave structureFurquan Shaikh
2016-11-22spi: Clean up SPI flash driver interfaceFurquan Shaikh
2016-05-09drivers/uart: Use uart_platform_refclk for all UART modelsLee Leahy
2016-04-21imgtec/pistachio: Fix memlayout ASSERT with new binutilsStefan Reinauer
2016-02-22urara: Increase bootblock sizeJulius Werner
2016-02-12tegra132/pistachio: Increase romstage size in memlayout.ldJulius Werner
2015-12-31imgtec/pistachio: disable default RPU gate register valuesIonela Voinescu
2015-12-31imgtec/pistachio: memlayout: update GRAM sizeIonela Voinescu
2015-12-31imgtec/pistachio: I2C: fix base address for I2C clock setupIonela Voinescu
2015-12-31imgtec/pistachio: identity map SOC registers regionIonela Voinescu
2015-12-31imgtec/pistachio: Add SOC_REGISTERS memory regionIonela Voinescu
2015-12-31imgtec/pistachio: Use SYS PLL in integer modeIonela Voinescu
2015-12-29mips: add coherency argument to identity mappingIonela Voinescu
2015-12-27mainboard/google/urara: change SYS PLL to 700MHzIonela Voinescu
2015-12-21imgtec/pistachio: DDR2, DDR3: DLL reset setIonela Voinescu
2015-12-21imgtec/pistachio: DDR2, DDR3: DQS gate earlyIonela Voinescu
2015-12-21imgtec/pistachio: increase CBFS cacheIonela Voinescu
2015-12-17Drop src/cpu/ indirection for MIPSStefan Reinauer
2015-12-17soc/imgtec/pistachio: add implementation for system resetIonela Voinescu
2015-12-17soc/imgtec/pistachio: Implement hard_reset()Stefan Reinauer
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-09-22linking: link bootblock.elf with .data and .bss sections againAaron Durbin
2015-09-09verstage: use common program.ld for linkingAaron Durbin
2015-08-31imgtec/pistachio: remove timestamp_get() implementationAaron Durbin
2015-08-09imgtech/pistacho: Add vboot2 memory regionPatrick Georgi
2015-06-24Remove address from GPLv2 headersPatrick Georgi
2015-06-21Remove old HAVE_UART_MEMORY_MAPPED select statementsMartin Roth
2015-06-12pistachio: add DDR3 initialization codeIonela Voinescu
2015-06-12pistachio: Use passive windowing as DQS gating schemeIonela Voinescu
2015-06-10pistachio: sort included header filesIonela Voinescu
2015-06-10pistachio: initialize cbmem area to be emptyIonela Voinescu
2015-06-09pistachio: increase romstage sizeIonela Voinescu
2015-06-02Revert "pistashio: bump up romstage size"Aaron Durbin
2015-05-26pistashio: bump up romstage sizeAaron Durbin
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-05-19Remove Kconfig variable that has no effectPatrick Georgi
2015-05-07imgtec/pistachio: Add comment on the unusual memory layoutPatrick Georgi
2015-04-30imgtech/pistachio: Give some more space to the bootblockPatrick Georgi
2015-04-29kbuild: automatically include SOCsStefan Reinauer
2015-04-22imgtec/pistachio: DDR reads return to controller with no bubblesIonela Voinescu
2015-04-22imgtec/pistachio: DDR row/bank/column mappingIonela Voinescu
2015-04-22soc: select generic gpio lib on (almost) all non-x86 SOCsStefan Reinauer
2015-04-22imgtec/pistachio: increase RAM CBFS cache sizeVadim Bendebury
2015-04-21pistachio: Remove 50% DDR bandwidth restrictionIonela Voinescu
2015-04-21pistachio: Decrease DDR ODT from 75R to 50RIonela Voinescu
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