Age | Commit message (Expand) | Author |
2015-12-31 | imgtec/pistachio: disable default RPU gate register values | Ionela Voinescu |
2015-12-31 | imgtec/pistachio: memlayout: update GRAM size | Ionela Voinescu |
2015-12-31 | imgtec/pistachio: I2C: fix base address for I2C clock setup | Ionela Voinescu |
2015-12-31 | imgtec/pistachio: identity map SOC registers region | Ionela Voinescu |
2015-12-31 | imgtec/pistachio: Add SOC_REGISTERS memory region | Ionela Voinescu |
2015-12-31 | imgtec/pistachio: Use SYS PLL in integer mode | Ionela Voinescu |
2015-12-29 | mips: add coherency argument to identity mapping | Ionela Voinescu |
2015-12-27 | mainboard/google/urara: change SYS PLL to 700MHz | Ionela Voinescu |
2015-12-21 | imgtec/pistachio: DDR2, DDR3: DLL reset set | Ionela Voinescu |
2015-12-21 | imgtec/pistachio: DDR2, DDR3: DQS gate early | Ionela Voinescu |
2015-12-21 | imgtec/pistachio: increase CBFS cache | Ionela Voinescu |
2015-12-17 | Drop src/cpu/ indirection for MIPS | Stefan Reinauer |
2015-12-17 | soc/imgtec/pistachio: add implementation for system reset | Ionela Voinescu |
2015-12-17 | soc/imgtec/pistachio: Implement hard_reset() | Stefan Reinauer |
2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
2015-09-22 | linking: link bootblock.elf with .data and .bss sections again | Aaron Durbin |
2015-09-09 | verstage: use common program.ld for linking | Aaron Durbin |
2015-08-31 | imgtec/pistachio: remove timestamp_get() implementation | Aaron Durbin |
2015-08-09 | imgtech/pistacho: Add vboot2 memory region | Patrick Georgi |
2015-06-24 | Remove address from GPLv2 headers | Patrick Georgi |
2015-06-21 | Remove old HAVE_UART_MEMORY_MAPPED select statements | Martin Roth |
2015-06-12 | pistachio: add DDR3 initialization code | Ionela Voinescu |
2015-06-12 | pistachio: Use passive windowing as DQS gating scheme | Ionela Voinescu |
2015-06-10 | pistachio: sort included header files | Ionela Voinescu |
2015-06-10 | pistachio: initialize cbmem area to be empty | Ionela Voinescu |
2015-06-09 | pistachio: increase romstage size | Ionela Voinescu |
2015-06-02 | Revert "pistashio: bump up romstage size" | Aaron Durbin |
2015-05-26 | pistashio: bump up romstage size | Aaron Durbin |
2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
2015-05-19 | Remove Kconfig variable that has no effect | Patrick Georgi |
2015-05-07 | imgtec/pistachio: Add comment on the unusual memory layout | Patrick Georgi |
2015-04-30 | imgtech/pistachio: Give some more space to the bootblock | Patrick Georgi |
2015-04-29 | kbuild: automatically include SOCs | Stefan Reinauer |
2015-04-22 | imgtec/pistachio: DDR reads return to controller with no bubbles | Ionela Voinescu |
2015-04-22 | imgtec/pistachio: DDR row/bank/column mapping | Ionela Voinescu |
2015-04-22 | soc: select generic gpio lib on (almost) all non-x86 SOCs | Stefan Reinauer |
2015-04-22 | imgtec/pistachio: increase RAM CBFS cache size | Vadim Bendebury |
2015-04-21 | pistachio: Remove 50% DDR bandwidth restriction | Ionela Voinescu |
2015-04-21 | pistachio: Decrease DDR ODT from 75R to 50R | Ionela Voinescu |
2015-04-21 | pistachio: clean DDR2 initialization code | Ionela Voinescu |
2015-04-21 | pistachio: add clock setup for all I2C interfaces | Ionela Voinescu |
2015-04-21 | urara: Identity map DRAM/SRAM | Andrew Bresticker |
2015-04-21 | imgtec/pistachio: Add spi_crop_chunk() | Patrick Georgi |
2015-04-17 | pistachio: Move console UART to a Kconfig variable | David Hendricks |
2015-04-17 | pistachio: add DDR2 initialization code | Ionela Voinescu |
2015-04-17 | pistachio: report UART register width | Vadim Bendebury |
2015-04-17 | uart: pass register width in the coreboot table | Vadim Bendebury |
2015-04-14 | pistachio: implement clock setup for I2C0 | Ionela Voinescu |
2015-04-14 | pistachio: Fix ROM clock base address | Ionela Voinescu |
2015-04-14 | urara: add clock setup for MIPS CPU, ROM and Ethernet | Ionela Voinescu |