coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2021-04-10	soc/intel/alderlake: Skip D3Cold for TBT	Subrata Banik
2021-04-06	soc/intel/alderlake: Update variable SD3C to only track enabled devices	John Zhao
2021-04-06	soc/intel/alderlake: Remove TCSS DMA _DSM method	John Zhao
2021-03-27	soc/intel: Rename and move MISCCFG_GPIO_PM_CONFIG_BITS definition to soc/gpio.h	Subrata Banik
2021-03-15	soc/intel/alderlake: Drop 100ms delay and do not poll Link Active	John Zhao
2021-03-15	soc/intel/alderlake: Remove _DSD from tcss_pciexp ASL file	Tim Wawrzynczak
2021-03-15	soc/intel/alderlake: Remove _DSD from tcss_dma ASL file	Tim Wawrzynczak
2021-03-01	soc/intel: Include gfx.asl from northbridge	Angel Pons
2021-02-17	soc/intel/alderlake: Fix PCI IRQ tables	Tim Wawrzynczak
2020-12-30	soc/intel/common: Move gfx.asl to drivers/intel/gma	Matt DeVillier
2020-11-20	soc/intel/common/acpi,mb/*: replace the two obsolete LPID with PEPD	Michael Niewöhner
2020-10-08	soc/intel: Make use of common gfx.asl	Subrata Banik
2020-10-06	soc/intel/alderlake/acpi: Add SoC ACPI directory for ADL	Subrata Banik
2020-09-27	soc/intel/alderlake: Add GPIOs for Alder Lake SOC	Subrata Banik