coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2021-02-05	soc/intel/alderlake: Refactor PCIE port config	Eric Lai
2021-02-03	src: Remove unused <cbmem.h>	Elyes HAOUAS
2021-02-01	soc/intel/alderlake: Create separate Kconfig for CLKSRC and CLKREQ	Subrata Banik
2021-01-31	soc/intel/*: drop incomplete and unneeded check for DMI SRLOCK	Michael Niewöhner
2021-01-30	soc/intel: Replace `SA_PCIEX_LENGTH` Kconfig options	Angel Pons
2021-01-30	soc/intel/alderlake: Remove pch.h from SoC directory	Subrata Banik
2021-01-29	device/Kconfig: Declare MMCONF symbols' type once	Angel Pons
2021-01-28	arch/x86: Remove most C_ENV_BOOTBLOCK_SIZE limits	Kyösti Mälkki
2021-01-27	soc/intel/alderlake: Generate LP4x SPD files using gen_spd.go	Amanda Huang
2021-01-26	soc/intel: Move c-state resource define	Marc Jones
2021-01-25	soc/intel/adl and mb/intel/adlrvp: Use the newly added meminit block driver	Furquan Shaikh
2021-01-25	soc/intel/{skl,cnl,xsp,icl,tgl,ehl,adl,jsl}: use common LPC mirroring	Michael Niewöhner
2021-01-23	ACPI: Add helpers for CBMEM_ID_POWER_STATE	Kyösti Mälkki
2021-01-23	ELOG: Add const qualifier for chipset_power_state	Kyösti Mälkki
2021-01-22	soc/intel/alderlake: Adding Kconfig for ADL_M PCH	Varshit Pandya
2021-01-21	soc/intel/alderlake: Disable Internal Gfx based on SOC_INTEL_DISABLE_IGD	Subrata Banik
2021-01-20	soc/intel/*: drop broken LPC mmio code	Michael Niewöhner
2021-01-20	ACPI GNVS: Drop most dev_count_cpu()	Kyösti Mälkki
2021-01-18	soc/intel/alderlake: Update PCH and CPU PCIe RP table	Eric Lai
2021-01-18	soc/intel/common: Move L1_substates_control to pcie_rp.h	Eric Lai
2021-01-12	soc/intel: rename uart_max_index	Michael Niewöhner
2021-01-12	soc/intel/alderlake: Add PCH ID 0x5182	Subrata Banik
2021-01-11	soc/intel/uart: Drop SoC callback `soc_uart_console_to_device`	Furquan Shaikh
2021-01-10	soc/intel/alderlake: Refactor SoC code to maintain CPU and PCH PCIE RPs	Subrata Banik
2021-01-10	soc/intel: Rename to soc_fill_gnvs()	Kyösti Mälkki
2021-01-10	ACPI: Drop redundant ChromeOS setup for GNVS	Kyösti Mälkki
2021-01-10	ACPI: Drop redundant CONSOLE_CBMEM setup in GNVS	Kyösti Mälkki
2021-01-08	soc/intel: Drop `dev` parameter from soc_get_gen_io_dec_range()	Furquan Shaikh
2021-01-06	soc/intel/alderlake: Update CPU microcode patch base address/size	Subrata Banik
2020-12-30	soc/intel/common: Move gfx.asl to drivers/intel/gma	Matt DeVillier
2020-12-30	soc/intel: hook up new gpio device in the soc chips	Michael Niewöhner
2020-12-29	soc/intel/alderlake: Update chipset.cb for TCSS and USB	Eric Lai
2020-12-23	soc/intel/alderlake: Enable support for extended BIOS window	Subrata Banik
2020-12-23	soc/intel/alderlake: Add SPI DMI Destination ID	Subrata Banik
2020-12-14	soc/intel/alderlake: Drop unreferenced devicetree settings	Angel Pons
2020-12-09	soc/intel/common/dmi: Move DMI defines into DMI driver header	Srinidhi N Kaushik
2020-12-04	soc/intel/alderlake: Align chipset.cb with pci_devs.h	Eric Lai
2020-12-04	src/soc/intel/alderlake: Enable the PCH HDA	V Sowmya
2020-11-30	soc/intel/alderlake: Add initial chipset.cb	Tim Wawrzynczak
2020-11-29	soc/intel: Configure P2SB before other PCH controllers	Furquan Shaikh
2020-11-29	soc/intel/alderlake: Add lp5_ccc_config to the board memory configuration	Sridhar Siricilla
2020-11-23	soc/intel/alderlake: Update UART0 GPIO as per latest schematics	Subrata Banik
2020-11-23	soc/intel/alderlake: Update DCACHE_BSP_STACK_SIZE and DCACHE_RAM_SIZE	Subrata Banik
2020-11-22	soc/intel/alderlake: Fix overlapping memory address used for early GSPI2 and ...	Bora Guvendik
2020-11-20	soc/intel/common/acpi,mb/*: replace the two obsolete LPID with PEPD	Michael Niewöhner
2020-11-12	soc/intel/alderlake: Add PCH ID 0x5181	Subrata Banik
2020-11-07	mb/intel: Enable ALC711 Audio codec over SNDW0 link	Sridhar Siricilla
2020-11-03	soc/intel: Select SOC_INTEL_COMMON_BLOCK_CAR as per alphabetical order	Subrata Banik
2020-11-02	soc/intel: Use of common reset code block	Subrata Banik
2020-10-29	mb/intel/adlrvp: Add dq_pins_interleaved into 'struct mb_cfg'	Subrata Banik