coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2016-04-29	soc/intel/apollolake: clarify Fast SPI CS2 pad configuration	Aaron Durbin
2016-04-28	soc/intel/apollolake: Add handling of GNVS ACPI entry for CHROMEOS builds	Lance Zhao
2016-04-28	soc/intel/apollolake: Add GPIO devices	Zhao, Lijian
2016-04-28	soc/intel/apollolake: Add cache for BIOS ROM	Andrey Petrov
2016-04-28	soc/intel/apollolake: Enable LPC bus interface	Andrey Petrov
2016-04-28	soc/intel/apollolake: Enable RAM cache for cbmem region in ramstage	Andrey Petrov
2016-04-28	soc/intel/apollolake: Fix northbridge _crs scope	Zhao, Lijian
2016-04-28	soc/intel/apollolake: Configure a GPIO for TPM in bootblock	Andrey Petrov
2016-04-28	soc/intel/apollolake: Avoid marking 0xe0000-0xfffff region usable	Andrey Petrov
2016-04-28	soc/intel/apollolake: Actually include ACPI PCI IRQ definitions	Andrey Petrov
2016-04-22	soc/intel/apollolake: Flush L1D to L2 only if loaded segment is in CAR	Furquan Shaikh
2016-04-21	soc/intel/apollolake: Set default memory type to uncacheable	Furquan Shaikh
2016-04-20	soc/intel/apollolake: add definitions for direct IRQ	Bora Guvendik
2016-04-20	mainboard/amenia: add the inital files for amenia board	Zhao, Lijian
2016-04-20	soc/intel/apollolake: configure interrupt trigger mode	Jagadish Krishnamoorthy
2016-04-18	soc/intel/apollolake: Do not re-save BIST result	Furquan Shaikh
2016-04-16	intel/apollolake: Fix whitespace issues	Martin Roth
2016-04-15	intel/apollolake: Fix logic error	Patrick Georgi
2016-04-15	soc/apollolake: Add helper functions to access Power Management Registers	Hannah Williams
2016-04-15	soc/intel/apollolake: Fix northbridge _CRS	Zhao, Lijian
2016-04-14	soc/apollolake: Add ACPI platform sleep capability	Hannah Williams
2016-04-14	soc/intel: Update license headers	Martin Roth
2016-04-13	soc/intel/apollolake: Add tsc_freq.c to all the stages	Andrey Petrov
2016-04-13	soc/intel/apollolake: Update platform-specific FSP headers	Andrey Petrov
2016-04-13	soc/intel/apollolake: Reserve IMRs (Isolated Memory Regions)	Andrey Petrov
2016-04-13	soc/intel/apollolake: logically group PMC BAR programming	Aaron Durbin
2016-04-11	soc/intel/apollolake: Fill _PRT entry in DSDT	Zhao, Lijian
2016-04-11	soc/intel/apollolake: Add lpss dsdt entry	Zhao, Lijian
2016-04-11	soc/apollolake/acpi: Fill ACPI HPET table	Zhao, Lijian
2016-04-11	soc/apollolake: Add lpc device driver	Lance Zhao
2016-04-11	soc/apollolake/acpi: Fill in ACPI MADT table	Lance Zhao
2016-04-11	soc/intel/apollolake: Enabling using of MRC data when available	Andrey Petrov
2016-04-11	soc/intel/apollolake: Enable CACHE_MRC_SETTINGS	Hannah Williams
2016-04-11	soc/apollolake/acpi: Fill ACPI MCFG table	Lance Zhao
2016-04-11	soc/intel/apollolake: Implement SPI controller driver	Alexandru Gagniuc
2016-04-11	cpu/x86/tsc: compile same code for all stages	Aaron Durbin
2016-04-08	soc/intel/apollolake: Override default to_flash_offset implementation	Alexandru Gagniuc
2016-04-05	soc/intel/apollolake: Fill ACPI FADT table	Lance Zhao
2016-04-04	soc/intel/apollolake: Fill northbridge ASL	Zhao, Lijian
2016-04-02	soc/intel/apollolake: use platform_segment_loaded() for CAR coherency	Aaron Durbin
2016-04-02	soc/intel/apollolake: use arch_segment_loaded() for CAR code coherency	Aaron Durbin
2016-04-02	soc/intel/apollolake: use CAR code coherency for all CAR stages	Aaron Durbin
2016-04-01	soc/intel/apollolake: Fix MMIO reserved ranges calculation	Andrey Petrov
2016-03-23	soc/intel/apollolake: utilize postcar phase/stage	Aaron Durbin
2016-03-21	soc/apollolake: Add skeleton ACPI entry	Lance Zhao
2016-03-11	soc/intel/apollolake: Avoid hardcoding CAR region size for FSPM	Andrey Petrov
2016-03-10	soc/apollolake: Add memory and reserve MMIO resources	Andrey Petrov
2016-03-10	soc/intel/apollolake: Avoid UART BAR relocation at ramstage	Andrey Petrov
2016-03-10	soc/intel/apollolake: Add ids of internal SoC PCI devices	Andrey Petrov
2016-03-10	soc/intel/apollolake: Add chip initialization	Andrey Petrov