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path: root/src/soc/intel/baytrail/Kconfig
AgeCommit message (Expand)Author
2016-12-07MMCONF_SUPPORT: Flip default to enabledKyösti Mälkki
2016-11-22Remove explicit select MMCONF_SUPPORTKyösti Mälkki
2016-11-08intel car: Remove references to DCACHE_RAM_ROMSTACK_SIZEKyösti Mälkki
2016-08-19Kconfig: introduce writable boot device notionAaron Durbin
2016-08-08chromeos chipsets: select RTC usageAaron Durbin
2016-07-15soc/intel/baytrail: use common Intel ACPI hardware definitionsAaron Durbin
2016-05-06soc/intel: indicate to build system that XIP_ROM_SIZE isn't usedAaron Durbin
2016-05-04cpu/x86: remove BACKUP_DEFAULT_SMM_REGION optionAaron Durbin
2015-10-05Add EM100 'hyper term' spi console support in ramstage & smmMartin Roth
2015-09-09x86: bootblock: remove linking and program flow from build systemAaron Durbin
2015-07-02Move baytrail & fsp_baytrail to the common IFD interface.Martin Roth
2015-06-24Kconfig: Get rid of obsolete symbolsMartin Roth
2015-06-23Kconfig: Move CBFS_SIZE into Mainboard menuMartin Roth
2015-05-29chromeos: always enable timestampsStefan Reinauer
2015-05-28smm: Merge configs SMM_MODULES and SMM_TSEGVladimir Serbinenko
2015-05-26acpi: Remove monolithic ACPIVladimir Serbinenko
2015-05-23baytrail: Switch to per-device ACPIVladimir Serbinenko
2015-05-053rdparty: move to 3rdparty/blobsPatrick Georgi
2015-05-053rdparty: Move to blobsPatrick Georgi
2015-04-30kbuild: Don't require intel/common changes for every socStefan Reinauer
2015-02-25soc/intel/baytrail/Kconfig: Remove explicit `HAVE_MONOTONIC_TIMER`Paul Menzel
2015-01-27CBMEM: Always use DYNAMIC_CBMEMKyösti Mälkki
2015-01-27vboot2: add verstageStefan Reinauer
2014-12-28intel baytrail broadwell: Include microcode updatesKyösti Mälkki
2014-10-28baytrail: move cache-as-ram base address to 0xfe000000Aaron Durbin
2014-10-22reg_script: default to n for ARCH_X86Isaac Christensen
2014-10-22baytrail: Move MRC cache code to a common directoryDuncan Laurie
2014-10-22baytrail/rambi: S3 support and other updatesKein Yuan
2014-10-19haswell baytrail: Enable RELOCATABLE_RAMSTAGEKyösti Mälkki
2014-08-28soc/intel/baytrail/Kconfig: Remove empty line at top filePaul Menzel
2014-08-15Move baytrail-specific config to baytrail.Vladimir Serbinenko
2014-07-23src/.../Kconfig: various small fixes to textsDaniele Forsi
2014-05-15baytrail: Enable PCIe common clock and ASPMDuncan Laurie
2014-05-15baytrail: use CPU_INTEL_TURBO_NOT_PACKAGE_SCOPEDAaron Durbin
2014-05-07baytrail: romstage: Add config option to enable RMTShawn Nematbakhsh
2014-05-06Introduce stage-specific architecture for corebootFurquan Shaikh
2014-05-03Move ARCH_* from board/Kconfig to cpu or soc Kconfig.Furquan Shaikh
2014-02-25Remove CACHE_ROM.Vladimir Serbinenko
2014-02-17baytrail: enable monotonic timerAaron Durbin
2014-02-16baytrail: bring up APsAaron Durbin
2014-02-11baytrail: add reset supportAaron Durbin
2014-02-11baytrail: adjust cache policy during romstageAaron Durbin
2014-02-05baytrail: Rearrange config options alphanumericallyVadim Bendebury
2014-02-05baytrail: start collecting timestampsAaron Durbin
2014-01-31baytrail: add initial supportAaron Durbin
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