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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
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path:
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src
/
soc
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intel
/
baytrail
/
chip.h
Age
Commit message (
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Author
2019-07-29
soc/intel/baytrail: Prevent unintended sign extensions
Jacob Garber
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-04-10
baytrail: add code for supporting 2x ddr refresh rate
Kane Chen
2015-01-16
baytrail: use the setting in devicetree.cb to config USBPHY_COMPBG
Kane Chen
2014-12-17
baytrail: initialize backlight PWM frequency
Aaron Durbin
2014-10-28
baytrail: Remove unused devicetree fields
Shawn Nematbakhsh
2014-10-22
baytrail/rambi: S3 support and other updates
Kein Yuan
2014-09-18
rambi/baytrail: ACPI, GPIO, audio, misc updates
Shawn Nematbakhsh
2014-05-10
baytrail: Add support for LPSS and SCC devices in ACPI mode
Duncan Laurie
2014-05-09
baytrail: Enable panel and set timings
Duncan Laurie
2014-05-09
baytrail: allow SD card controller capabilities overrides
Aaron Durbin
2014-05-08
baytrail: add lpe codec clock configuration
Aaron Durbin
2014-05-07
baytrail: pcie: Root port initialization
Aaron Durbin
2014-03-11
baytrail: Add EHCI initialization
Duncan Laurie
2014-03-11
baytrail: Add XHCI initialization
Duncan Laurie
2014-02-27
baytrail: Add SATA driver
Shawn Nematbakhsh
2014-01-31
baytrail: add initial support
Aaron Durbin