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path: root/src/soc/intel/baytrail/pcie.c
AgeCommit message (Expand)Author
2020-03-04src: capitalize 'PCIe'Elyes HAOUAS
2019-08-15soc/intel: Rename some SMM support functionsKyösti Mälkki
2019-07-18soc/intel: Use config_of()Kyösti Mälkki
2019-03-22soc/intel/{baytrail,braswell}: Make use of generic set_subsystem()Kyösti Mälkki
2019-03-01device/pci: Fix PCI accessor headersKyösti Mälkki
2018-10-23src: Remove unneeded whitespaceElyes HAOUAS
2018-05-24soc/intel/baytrail: Get rid of device_tElyes HAOUAS
2016-08-31src/soc: Add required space before opening parenthesis '('Elyes HAOUAS
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-06-04devicetree: Change scan_bus() prototype in device opsKyösti Mälkki
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-04-10baytrail: fix the coding error on PCIe L1 exit latencyKevin L Lee
2015-04-10Baytrail: Prior to PCI scan, wait for LCTL to be active in 50 msKevin Hsieh
2015-04-07baytrail: Change all SoC headers to <soc/headername.h> systemJulius Werner
2015-04-04Baytrail: Fix no_dev_behind_port not executed for RP1/2/3.Kenji Chen
2015-04-02Baytrail: Change PCIe root disable algorithmKenji Chen
2014-12-08intel/baytrail: Spelling fixesMartin Roth
2014-10-22baytrail/rambi: S3 support and other updatesKein Yuan
2014-05-10baytrail: utilize reg_script_run_on_dev()Aaron Durbin
2014-05-07baytrail: pcie: Root port initializationAaron Durbin