| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2015-05-13 | baytrail: broadwell: correct refcode loading | Aaron Durbin |
| 2015-04-22 | coreboot: common stage cache | Aaron Durbin |
| 2015-04-07 | baytrail: Change all SoC headers to <soc/headername.h> system | Julius Werner |
| 2015-04-03 | rmodule: use struct prog while loading rmodules | Aaron Durbin |
| 2015-03-30 | baytrail: fix HAVE_REFCODE_BLOB build errors | Aaron Durbin |
| 2014-11-09 | src: Too many terminators ';;' at end of stmts, stop Skynet | Edward O'Callaghan |
| 2014-07-08 | soc: Trivial - drop trailing blank lines at EOF | Edward O'Callaghan |
| 2014-06-21 | intel boards: Use acpi_is_wakeup_s3() | Kyösti Mälkki |
| 2014-05-12 | baytrail: add way to load reference code from vboot area | Aaron Durbin |
| 2014-05-10 | baytrail: cache reference code for S3 resume | Aaron Durbin |
| 2014-02-24 | baytrail: use version 2 of efi wrapper | Aaron Durbin |
| 2014-02-17 | baytrail: add support to run reference code blob | Aaron Durbin |
 |
index : coreboot | |
| Some coreboot project code with my work | vimacs |
| summaryrefslogtreecommitdiff |