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coreboot
2560p
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autoport-hsw
broadwell_refcode
e6230
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haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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intel
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baytrail
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xhci.c
Age
Commit message (
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Author
2020-05-02
acpi: Move ACPI table support out of arch/x86 (3/5)
Furquan Shaikh
2020-04-06
soc/intel/baytrail: Use SPDX for GPL-2.0-only files
Angel Pons
2020-03-18
soc: Remove copyright notices
Patrick Georgi
2019-07-18
soc/intel: Use config_of()
Kyösti Mälkki
2019-03-01
device/pci: Fix PCI accessor headers
Kyösti Mälkki
2018-05-24
soc/intel/baytrail: Get rid of device_t
Elyes HAOUAS
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-04-07
baytrail: Change all SoC headers to <soc/headername.h> system
Julius Werner
2015-04-02
baytrail: Change USB3 PLL VCO and iCLK PLL current on BYT-M/D CPU
Kein Yuan
2015-03-10
ACPI: Get S3 resume state from romstage_handoff
Kyösti Mälkki
2014-09-18
rambi/baytrail: ACPI, GPIO, audio, misc updates
Shawn Nematbakhsh
2014-05-10
baytrail: utilize reg_script_run_on_dev()
Aaron Durbin
2014-04-30
baytrail: Fix XHCI problems and re-enable
Duncan Laurie
2014-03-11
baytrail: Add XHCI initialization
Duncan Laurie